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ST72F63BK2M1 Fiches technique(PDF) 7 Page - STMicroelectronics |
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ST72F63BK2M1 Fiches technique(HTML) 7 Page - STMicroelectronics |
7 / 132 page ST7263B 7/132 Note (*): if the peripheral is present on the device (see Table 1, "Device Summary") Legend / Abbreviations for Figure 2 and Table 2: Type: I = input, O = output, S = supply In/Output level: CT = CMOS 0.3VDD/0.7VDD with input trigger Output level: 10mA = 10mA high sink (on N-buffer only) 25mA = 25mA very high sink (on N-buffer only) Port and control configuration: – Input: float = floating, wpu = weak pull-up, int = interrupt, ana = analog – Output: OD = open drain, PP = push-pull, T = True open drain Refer to “I/O PORTS” on page 25 for more details on the software configuration of the I/O ports. The RESET configuration of each pin is shown in bold. This configuration is kept as long as the device is under reset state. 22 23 PA3/EXTCLK I/O CT X X Port A3 Timer External Clock 23 24 PA2/SCL/ICCCLK I/O CT 25mA X T Port A2 I²C serial clock*, ICC Clock -- 25 NC -- Not connected 24 26 NC -- Not connected 25 27 NC -- Not connected 26 28 PA1/SDA/ICCDATA I/O CT 25mA X T Port A1 I²C serial data*, ICC Data 27 29 PA0/MCO I/O CT XX Port A0 Main Clock Output 28 30 VSSA S Analog ground 29 31 USBDP I/O USB bidirectional data (data +) 30 32 USBDM I/O USB bidirectional data (data -) 31 33 USBVCC O USB power supply 32 34 VDDA S Analog supply voltage Pin n° Pin Name Level Port / Control Main Function (after reset) Alternate Function Input Output |
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