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STP12NM50FP Fiches technique(PDF) 4 Page - STMicroelectronics |
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STP12NM50FP Fiches technique(HTML) 4 Page - STMicroelectronics |
4 / 17 page Electrical characteristics STP12NM50-STP12NM50FP-STB12NM50-STB12NM50-1 4/17 2 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage ID = 250 µA, VGS= 0 500 V IDSS Zero gate voltage drain current (VGS = 0) VDS = Max rating, VDS = Max rating @125°C 1 10 µA µA IGSS Gate body leakage current (VDS = 0) VGS = ±30V ± 100 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 50µA 34 5 V RDS(on) Static drain-source on resistance VGS= 10V, ID= 6A 0.30 0.35 Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit gfs (1) 1. Pulsed: pulse duration=300µs, duty cycle 1.5% Forward transconductance VDS =15V, ID = 6A 5.5 S Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS =25V, f=1 MHz, VGS=0 1000 250 20 pF pF pF Coss eq (2) . 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS inceases from 0 to 80% VDSS Equivalent output capacitance VGS=0, VDS =0V to 400V 90 pF td(on) tr Turn-on Delay Time Rise Time VDD = 250V, ID = 6A, RG = 4.7Ω, VGS = 10V (see Figure 14) 20 10 ns ns Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD=400V, ID = 12A VGS =10V (see Figure 15) 28 8 18 39 nC nC nC Rg Gate input resistance f=1MHz Gate DC Bias=0 test signal level=20mV open drain 1.6 Ω |
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