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AMC1203BDWR Fiches technique(PDF) 4 Page - Texas Instruments

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No de pièce AMC1203BDWR
Description  1-Bit, 10MHz, 2nd-Order, Isolated Delta-Sigma Modulator
Download  23 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

AMC1203BDWR Fiches technique(HTML) 4 Page - Texas Instruments

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PACKAGE CHARACTERISTICS
(1)
IEC SAFETY LIMITING VALUES
IEC 61000-4-5 RATINGS
IEC 60664-1 RATINGS
AMC1203
SBAS427 – FEBRUARY 2008
Over recommended operating conditions, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Shortest terminal to terminal distance
L(I01)
Minimum air gap (clearance)
7.0
mm
through air
Shortest terminal to terminal distance
L(I02)
Minimum external tracking (creepage)
7.0
mm
across the package surface
Tracking resistance (comparative
CTI
DIN IEC 60112 / VDE 0303 Part 1
≥ 175
V
tracking index)
Minimum internal gap (internal
Distance through the insulation
0.008
mm
clearance)
Input to output, VIO = 500V, all pins on
each side of the barrier tied together
> 1012
creating a two-terminal device, TA < +85°C
RIO
Isolation resistance
Input to output, VIO = 500V,
> 1011
+100
°C ≤ T
A < TA max
CIO
Barrier capacitance input to output
VI = 0.8VPP at 1MHz
1.2
pF
CI
Input capacitance to ground
VI = 0.8VPP at 1MHz
3
pF
(1)
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care
should be taken to maintain the creepage and clearance distance of the board design to ensure that the mounting pads of the isolator
on the printed circuit board do not reduce this distance. Creepage and clearance on a printed circuit board become equal according to
the measurement techniques shown in the Isolation Glossary. Techniques such as inserting grooves and/or ribs on a printed circuit
board are used to help increase these specifications.
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output (I/O) circuitry. A
failure of the I/O circuitry can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient
power to overheat the die and damage the isolation barrier, potentially leading to secondary system failures.
The safety-limiting constraint is the operating virtual junction temperature range specified in the Absolute Maximum Ratings
table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware
determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Characteristics table is
that of a device installed in the JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount
Packages and is conservative. The power is the recommended maximum input voltage times the current. The junction
temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IS
Safety input, output, or supply current
θ
JA = 246°C/W, VI = 5.5V, TJ = +150°C, TA = +25°C
90
mA
TC
Maximum case temperature
+150
°C
PARAMETER
TEST CONDITIONS
VALUE
UNIT
Surge immunity
1.2/50
µs voltage surge and 8/20µs current surge
±6000
V
PARAMETER
TEST CONDITIONS
SPECIFICATION
Basic isolation group
Material group
IIIa
Rated mains voltage
≤ 150 VRMS
I-IV
Installation classification
Rated mains voltage < 300 VRMS
I-III
4
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Product Folder Link(s): AMC1203


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