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TPS2490DGS Fiches technique(PDF) 11 Page - Texas Instruments

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No de pièce TPS2490DGS
Description  POSITIVE HIGH-VOLTAGE POWER-LIMITING HOTSWAP CONTROLLER
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS2490DGS Fiches technique(HTML) 11 Page - Texas Instruments

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VCC CH1
VCC 10 V/div
Timer 1 V/div
IIN 1 A/div
PG
10 V/div
OUT
10 V/div
TPS2490
TPS2491
SLVS503 – NOVEMBER 2003
APPLICATION INFORMATION
BASIC OPERATION
The TPS2490/91 provides all the features needed for a positive hotswap controller. These features include: 1)
under-voltage lockout; 2) adjustable (system-level) enable; 3) turn-on inrush limit; 4) high-side gate drive for an
external N-channel MOSFET; 5) MOSFET protection (power limit and current limit); 6) adjustable overload
timeout—also called an electronic circuit breaker; 7) charge-complete indicator for downstream converter
coordination; and 8) an optional automatic restart mode. The TPS2490/91 features superior power-limiting
MOSFET protection that allows independent control of current limit (to set maximum full-load current), power limit
(to control junction temperature rise), and overload time (to control case temperature rise).
The typical application circuit, and oscilloscope plots of Figures 12–16 demonstrate many of the functions
described above.
Board Plug-In (Figure 12)
Only the bypass capacitor charge current and small bias currents are evident when a board is first plugged in.
The TPS2490/91 is held inactive, and GATE, PROG, TIMER, and PG are held low for less than 1 ms while
internal voltages stabilize. A startup cycle is ready to take place after the stabilization.
GATE, PROG, TIMER, and PG are released after stabilization in this example because both the internal UVLO
threshold and the external EN (enable) thresholds have been exceeded. The part begins sourcing current from
the GATE pin and M1 begins to turn on while the voltage across it, V(SENSE–OUT), and current through it,
V(VCC–SENSE), are monitored. Current initially rises to the value which satisfies the power limit engine (PLIM÷ VVCC)
since the output capacitor was discharged.
TIMER and PG Operation (Figure 12)
The TIMER pin charges CT as long as limiting action continues, and discharges at a 1/10 charge rate when
limiting stops. If the voltage on CT reaches 4 V before the output is charged, M1 is turned off and either a
latch-off or restart cycle commences, depending on the part type. The open-drain PG output provides a
deglitched end-of-charge indication which is based on the voltage across M1. PG is useful for preventing a
downstream dc/dc converter from starting while CO is still charging. PG goes active (open drain) about 9 ms after
CO is charged. This delay allows M1 to fully turn on and any transients in the power circuits to end before the
converter starts up. The resistor pull-up shown on pin PG in the typical application diagram only demonstrates
operation; the actual connection to the converter depends on the application. Timing can appear to terminate
early in some designs if operation transitions out of the power limit mode into a gate charge limited mode at low
VDS values.
Figure 12. Basic Board Insertion
11


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