List of Tables
Table 1.
Documentation Conventions ............................................................................................ 18
Table 3-1.
Memory Map ................................................................................................................... 39
Table 4-1.
Exception Types .............................................................................................................. 41
Table 4-2.
Interrupts ........................................................................................................................ 42
Table 5-1.
JTAG Port Pins Reset State ............................................................................................. 46
Table 5-2.
JTAG Instruction Register Commands ............................................................................... 51
Table 6-1.
System Control Register Map ........................................................................................... 61
Table 7-1.
Hibernation Module Register Map ................................................................................... 119
Table 8-1.
Flash Protection Policy Combinations ............................................................................. 135
Table 8-2.
Flash Resident Registers ............................................................................................... 136
Table 8-3.
Flash Register Map ........................................................................................................ 136
Table 9-1.
GPIO Pad Configuration Examples ................................................................................. 160
Table 9-2.
GPIO Interrupt Configuration Example ............................................................................ 160
Table 9-3.
GPIO Register Map ....................................................................................................... 162
Table 10-1.
16-Bit Timer With Prescaler Configurations ..................................................................... 202
Table 10-2.
Timers Register Map ...................................................................................................... 208
Table 11-1.
Watchdog Timer Register Map ........................................................................................ 235
Table 12-1.
Samples and FIFO Depth of Sequencers ........................................................................ 258
Table 12-2.
ADC Register Map ......................................................................................................... 262
Table 13-1.
UART Register Map ....................................................................................................... 296
Table 14-1.
SSI Register Map .......................................................................................................... 342
Table 15-1.
Examples of I
2C Master Timer Period versus Speed Mode ............................................... 371
Table 15-2.
Inter-Integrated Circuit (I
2C) Interface Register Map ......................................................... 380
Table 15-3.
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 385
Table 16-1.
Comparator 0 Operating Modes ...................................................................................... 405
Table 16-2.
Comparator 1 Operating Modes ...................................................................................... 405
Table 16-3.
Comparator 2 Operating Modes ...................................................................................... 406
Table 16-4.
Internal Reference Voltage and ACREFCTL Field Values ................................................. 406
Table 16-5.
Analog Comparators Register Map ................................................................................. 408
Table 18-1.
Signals by Pin Number ................................................................................................... 417
Table 18-2.
Signals by Signal Name ................................................................................................. 421
Table 18-3.
Signals by Function, Except for GPIO ............................................................................. 425
Table 18-4.
GPIO Pins and Alternate Functions ................................................................................. 429
Table 19-1.
Temperature Characteristics ........................................................................................... 431
Table 19-2.
Thermal Characteristics ................................................................................................. 431
Table 20-1.
Maximum Ratings .......................................................................................................... 432
Table 20-2.
Recommended DC Operating Conditions ........................................................................ 432
Table 20-3.
LDO Regulator Characteristics ....................................................................................... 433
Table 20-4.
Flash Memory Characteristics ........................................................................................ 433
Table 20-5.
Phase Locked Loop (PLL) Characteristics ....................................................................... 434
Table 20-6.
Clock Characteristics ..................................................................................................... 434
Table 20-7.
Crystal Characteristics ................................................................................................... 434
Table 20-8.
ADC Characteristics ....................................................................................................... 435
Table 20-9.
Analog Comparator Characteristics ................................................................................. 435
Table 20-10.
Analog Comparator Voltage Reference Characteristics .................................................... 435
Table 20-11.
I
2C Characteristics ......................................................................................................... 436
September 02, 2007
10
Preliminary
Table of Contents