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TPS40210DGQ Fiches technique(PDF) 3 Page - Texas Instruments |
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TPS40210DGQ Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 39 page www.ti.com ELECTRICAL CHARACTERISTICS TPS40210, TPS40211 SLUS772 – MARCH 2008 TJ = –40°C to 125°C, VVDD= 12 Vdc, all parameters at zero power dissipation (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOLTAGE REFERENCE TPS40210 COMP = FB, 4.5 ≤ VVDD ≤ 52 V, TJ = 25°C 693 700 707 Feedback voltage range TPS40211 COMP=FB, 4.5 ≤ VVDD ≤ 52 V, TJ = 25°C 254 260 266 COMP = FB, 4.5 ≤ VVDD ≤ 52 V, -40°C ≤ TJ ≤ VFB mV TPS40210 686 700 714 125 °C COMP = FB, 4.5 ≤ VVDD ≤ 52 V, -40°C ≤ TJ ≤ TPS40211 250 260 270 125 °C INPUT SUPPLY VVDD Input voltage range 4.5 52 V 4.5 ≤ VVDD ≤ 52 V, no switching, VDIS < 0.8 1.5 2.5 mA IVDD Operating current 2.5 ≤ VDIS ≤ 7 V 10 20 µA VVDD < VUVLO(on), VDIS < 0.8 530 µA UNDERVOLTAGE LOCKOUT VUVLO(on) Turn on threshold voltage 4.00 4.25 4.50 V VUVLO(hyst) UVLO hysteresis 140 195 240 mV OSCILLATOR Oscillator frequency range(1) 35 1000 fOSC kHz Oscillator frequency RRC = 182 kΩ, CRC = 330 pF 260 300 340 Frequency line regulation 4.5 ≤ VDD ≤ 52 V -20% 7% VSLP Slope compensation ramp 520 620 720 mV PWM VVDD = 12V (1) 275 400 tON(min) Minimum pulse width VVDD = 30V 90 200 ns tOFF(min) Minimum off time 170 200 VVLY Valley voltage 1.2 V SOFT-START Offset voltage from SS pin to error VSS(ofst) 700 mV amplifier input RSS(chg) Soft-start charge resistance 320 430 600 k Ω RSS(dchg) Soft-start discharge resistance 840 1200 1600 ERROR AMPLIFIER GBWP Unity gain bandwidth product(1) 1.5 3.0 MHz AOL Open loop gain(1) 60 80 dB Input bias current (current out of FB IIB(FB) 100 300 nA pin) ICOMP(src) Output source current VFB = 0.6 V, VCOMP = 1 V 100 250 µA ICOMP(snk) Output sink current VFB = 1.2 V, VCOMP = 1 V 1.2 2.5 mA OVERCURRENT PROTECTION Overcurrent detection threshold (at VISNS(oc) 4.5 ≤ VDD < 52 V, -40°C ≤ TJ ≤ 125°C 120 150 180 mV ISNS pin) DOC Overcurrent duty cycle(1) 2% Overcurrent reset threshold voltage (at VSS(rst) 100 150 350 mV SS pin) TBLNK Leading edge blanking(1) 75 ns (1) Ensured by design. Not production tested. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TPS40210 TPS40211 |
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