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FST3125QSCX Fiches technique(PDF) 1 Page - Fairchild Semiconductor

No de pièce FST3125QSCX
Description  4-Bit Bus Switch
Download  9 Pages
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Fabricant  FAIRCHILD [Fairchild Semiconductor]
Site Internet  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FST3125QSCX Fiches technique(HTML) 1 Page - Fairchild Semiconductor

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March 2008
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FST3125 • Rev. 1.0.3
FST3125 — 4-Bit Bus Switch
Features
4
Ω Switch Connection between Two Ports
Minimal Propagation Delay through the Switch
Low ICC
Zero Bounce in Flow-through Mode
Control Inputs Compatible with TTL Level
Description
Fairchild switch FST3125 provides four high-speed
CMOS TTL-compatible bus switches. The low on
resistance of the switch allows inputs to be connected
to
outputs
without
adding
propagation
delay
or
generating additional ground bounce noise.
The device is organized as four one1-bit switches with
separate /OE inputs. When /OE is LOW, the switch is
ON and port A is connected to port B. When /OE is
HIGH, the switch is OPEN and a high-impedance state
exists between the two ports.
Ordering Information
Part Number
Operating
Temperature
Range
Package
Packing
Method
FST3125M
-40 to 85°C
14-Lead, Small Outline Integrated Circuit (SOIC) 0.150 inch
Narrow
Tube
FST3125MX
-40 to 85°C
14-Lead, Small Outline Integrated Circuit (SOIC) 0.150 inch
Narrow
Tape and Reel
FST3125QSC
-40 to 85°C
16-Lead, Quarter Size Outline Package (QSOP) MO-137
0.150 inch Wide
Tube
FST3125QSCX
-40 to 85°C
16-Lead, Quarter Size Outline Package (QSOP) MO-137
0.150 inch Wide
Tape and Reel
FST3125MTC
-40 to 85°C
14-Lead, Thin Shrink Small Outline Package (TSSOP)
MO-153, 4mm Wide
Tube
FST3125MTCX
-40 to 85°C
14-Lead, Thin Shrink Small Outline Package (TSSOP)
MO-153, 4mm Wide
Tape and Reel
All packages are lead free per JEDEC: J-STD-020B standard.
The Fairchild switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Figure 1. Logic Diagram


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