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L6232E Fiches technique(PDF) 4 Page - STMicroelectronics |
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L6232E Fiches technique(HTML) 4 Page - STMicroelectronics |
4 / 10 page Symbol Parameter Test Condition Min. Typ. Max. Unit Gm LIN Error Amplifier Transconductance 0.8 mA/V Zout Error Amplifier Output Impedance 2M Ω VINH Logic Input Voltage BRK; INUA; INUB; INUC; INLA; INLB; INLC 2V VINL 0.8 V IINH(leak) Logic Input Current BRK; INUA; INUB; INUC; INLA; INLB; INLC Vi = 2.7V -1 mA IINL Vi = 0.4V -0.1 mA tdonU Upper/Lower Turn-on Delay Table 1 see Fig. 3 0.7 µs tdonL 0.15 µs tdoffU Upper/Lower Turn-off Delay 15 µs tdoffL 0.5 µs dV/dt Source DMOS Slew-Rate (PWM) see Fig. 3 10 V/ µs dV/dt Source DMOS Slew-Rate (LIN) see Fig. 3 1 V/ µs dV/dt Sink DMOS Output Turn-off Slew-Rate Note 3; R = 100K Ω 0.15 V/ µs FC Internal Clock Frequency 380 KHz Toff PWM Cutoff Time R=100K Ω; C=180pF, Note 4; see Fig. 2 40 µs Tsd Shutdown Temperature 160 °C Tsdr Recovery Temperature 120 °C Notes: 1) The Head Park time must be shorter than the Brake Delay time td(BRK) =RdCd 2) Both in PWM and in LIN mode the Ref. Voltage must agree to Vref=GV RS Imotor 3) The resistance of the RC network defines the dv/dt value. 4) toff = 1.8RC + 6 ⋅ 10-6 ELECTRICAL CHARACTERISTICS (continued) Table 1 INPUT STATE OUTPUT STATE INUA INUB INUC INLA INLB INLC A B C LLL H H H* * * LLL LL L H H H HHH L L L * * * HHH HH H L L L H = The Upper DMOS is ON L = The Lower DMOS is ON * = Tristate condition L6232E 4/10 |
Numéro de pièce similaire - L6232E |
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Description similaire - L6232E |
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