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ADC12081 Fiches technique(PDF) 10 Page - National Semiconductor (TI) |
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ADC12081 Fiches technique(HTML) 10 Page - National Semiconductor (TI) |
10 / 17 page Specification Definitions APERTURE JITTER is the variation in aperture delay from sample to sample. Aperture jitter shows up as input noise. APERTURE DELAY See Sampling Delay. CLOCK DUTY CYCLE is the ratio of the time that the clock waveform is high to the total time for one clock cycle. DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1 LSB. EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise and Distortion Ratio, or SINAD. ENOB is defined as (SINAD - 1.76) / 6.02 and says that the converter is equivalent to a perfect ADC of this (ENOB) number of bits. FULL POWER BANDWIDTH is the frequency at which the reconstructed output fundamental drops 3 dB below its low frequency value for a full scale input. FULL SCALE ERROR is the difference between the input voltage just causing a transition to positive full scale and V REF -1.5 LSB. INTEGRAL NON-LINEARITY (INL) is a measure of the deviation of each individual code from a line drawn from negative full scale (1⁄2 LSB below the first code transition) through positive full scale (11⁄2 LSB above the last code transition). The deviation of any given code from this straight line is measured from the center of that code value. The end point test method is used. INL is commonly measured at rated clock frequency with a ramp input. INTERMODULATION DISTORTION (IMD) is the creation of additional spectral components as a result of two sinusoidal frequencies being applied to the ADC input at the same time. It is defined as the ratio of the power in the intermodulation products to the total power in the original frequencies. IMD is usually expressed in dB. PIPELINE DELAY (LATENCY) is the number of clock cycles between initiation of conversion and the availability of that conversion result at the output. New data is available at every clock cycle, but the data lags the conversion by the pipeline delay plus the Output Delay. SAMPLING (APERTURE) DELAY is the time after the edge of the clock to when the input signal is acquired or held for conversion. SIGNAL TO NOISE PLUS DISTORTION (S/(N+D) or SI- NAD) is the ratio expressed in dB, of the rms value of the input signal to the rms value of all of the other spectral components below half the clock frequency, including har- monics but excluding dc. SIGNAL TO NOISE RATIO (SNR) is the ratio of the rms value of the input signal to the rms value of the other spectral components below one-half the sampling frequency, not in- cluding harmonics or dc. SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ- ence, expressed in dB, between the rms values of the input signal and the peak spurious signal, where a spurious signal is any signal present in the output spectrum that is not present at the input. TOTAL HARMONIC DISTORTION (THD) is the ratio of the rms total of the first six harmonic components, to the rms value of the input signal. ZERO SCALE OFFSET ERROR is the difference between the ideal input voltage (1⁄2 LSB) and the actual input voltage that just causes a transition from an output code of zero to an output code of one. ZERO ERROR see Zero Scale Offset Error. www.national.com 10 |
Numéro de pièce similaire - ADC12081 |
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Description similaire - ADC12081 |
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