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ADC12048CIV Fiches technique(PDF) 8 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No de pièce ADC12048CIV
Description  12-Bit Plus Sign 216kHz 8-Channel Sampling Analog-to-Digital Converter
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
Logo NSC - National Semiconductor (TI)

ADC12048CIV Fiches technique(HTML) 8 Page - National Semiconductor (TI)

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Digital Timing Characteristics (Continued)
The following specifications apply to the ADC12048, 13-bit data bus width, V
A+=VD+ = 5V, fCLK = 12 MHz, tf = 3 ns and CL
= 50 pF on data I/O lines
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 10)
(Note 11)
(Limit)
t
CSWR
Falling Edge of CS to Falling Edge of WR
0ns
t
WRCS
Active Edge of WR to Rising Edge of CS
0ns
t
WR
WR Pulse Width
20
30
ns (min)
t
WRSETFalling
Write Setup Time
WMODE = “1”
20
ns (min)
t
WRHOLDFalling
Write Hold Time
WMODE = “1”
5
ns (min)
t
WRSETRising
Write Setup Time
WMODE = “0”
20
ns (min)
t
WRHOLDRising
Write Hold Time
WMODE = “0”
5
ns (min)
t
CSRD
Falling Edge of CS to Falling Edge of RD
0ns
t
RDCS
Rising Edge of RD to Rising Edge of CS
0ns
t
RDDATA
Falling Edge of RD to Valid Data
8-Bit Mode (BW Bit = “0”)
40
58
ns (max)
t
RDDATA
Falling Edge of RD to Valid Data
13-Bit Mode (BW Bit = “1”)
26
44
ns (max)
t
RDHOLD
Read Hold Time
23
32
ns (max)
t
RDRDY
Rising Edge of RD to Rising Edge of RDY
24
38
ns (max)
t
WRRDY
Active Edge of WR to Rising Edge of RDY
WMODE = “1”
42
65
ns (max)
t
STNDBY
Active Edge of WR to Falling Edge of
STDBY
WMODE = “0”. Writing the
Standby Command into the
Configuration Register
200
230
ns (max)
t
STDONE
Active Edge of WR to Rising Edge of
STDBY
WMODE = “0”. Writing the
RESET Command into the
Configuration Register
30
45
ns (max)
t
STDRDY
Active Edge of WR to Falling Edge of RDY
WMODE = “0”. Writing the
RESET Command into the
Configuration Register
1.4
2.5
ms (max)
t
SYNC
Minimum SYNC Pulse Width
5
10
ns (min)
Notes on Specifications
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: When the input voltage (VIN) at any pin exceeds the power supply rails (VIN < GND or VIN > (VA+orVD+)), the current at that pin should be limited to
30 mA. The 120 mA maximum package input current limits the number of pins that can safely exceed the power supplies with an input current of 30 mA to four.
Note 4: The maximum power dissipation must he derated at elevated temperatures and is dictated by TJmax, (maximum junction temperature), θJA (package
junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax =(TJmax −TA)/θJA
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device, TJmax = 150˚C, and the typical thermal resistance (θJA) of the ADC12048
in the V package, when board mounted, is 55˚C/W, and in the VF package, when board mounted, is 67.8˚C/W.
Note 5: Human body model, 100 pF discharged through 1.5 k
Ω resistor.
Note 6: Each input and output is protected by a nominal 6.5V breakdown voltage zener diode to GND; as shown below, input voltage magnitude up to 0.3V above
VA+ or 0.3V below GND will not damage the ADC12048. There are parasitic diodes that exist between the inputs and the power supply rails and errors in the A/D
conversion can occur if these diodes are forward biased by more than 50 mV. As an example, if VA+ is 4.50 VDC, full-scale input voltage must be ≤ 4.55 VDC to ensure
accurate conversions.
www.national.com
8


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