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OP07CSZ-REEL7 Fiches technique(PDF) 1 Page - Analog Devices

No de pièce OP07CSZ-REEL7
Description  Ultralow Offset Voltage Operational Amplifier
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

OP07CSZ-REEL7 Fiches technique(HTML) 1 Page - Analog Devices

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Ultralow Offset Voltage
Operational Amplifier
OP07
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
FEATURES
Low VOS: 75 μV maximum
Low VOS drift: 1.3 μV/°C maximum
Ultrastable vs. time: 1.5 μV per month maximum
Low noise: 0.6 μV p-p maximum
Wide input voltage range: ±14 V typical
Wide supply voltage range: 3 V to 18 V
125°C temperature-tested dice
APPLICATIONS
Wireless base station control circuits
Optical network control circuits
Instrumentation
Sensors and controls
Thermocouples
Resistor thermal detectors (RTDs)
Strain bridges
Shunt current measurements
Precision filters
GENERAL DESCRIPTION
The OP07 has very low input offset voltage (75 μV maximum for
OP07E) that is obtained by trimming at the wafer stage. These
low offset voltages generally eliminate any need for external
nulling. The OP07 also features low input bias current (±4 nA for
the OP07E) and high open-loop gain (200 V/mV for the OP07E).
The low offset and high open-loop gain make the OP07
particularly useful for high gain instrumentation applications.
PIN CONFIGURATION
1
VOS TRIM
8
VOS TRIM
2
–IN
7
V+
3
+IN
6
OUT
4
V–
5
NC
OP07
NC = NO CONNECT
Figure 1.
The wide input voltage range of ±13 V minimum combined
with a high CMRR of 106 dB (OP07E) and high input
impedance provide high accuracy in the noninverting circuit
configuration. Excellent linearity and gain accuracy can be
maintained even at high closed-loop gains. Stability of offsets
and gain with time or variations in temperature is excellent. The
accuracy and stability of the OP07, even at high gain, combined
with the freedom from external nulling have made the OP07 an
industry standard for instrumentation applications.
The OP07 is available in two standard performance grades. The
OP07E is specified for operation over the 0°C to 70°C range,
and the OP07C is specified over the −40°C to +85°C
temperature range.
The OP07 is available in epoxy 8-lead PDIP and 8-lead narrow
SOIC packages. For CERDIP and TO-99 packages and standard
microcircuit drawing (SMD) versions, see the OP77.
1 R2A AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY FOR MINIMUM INPUT OFFSET VOLTAGE.
6
V+
7
8
3
C3
1
4
2
OUT
Q5
R2A1
R5
R8
R7
V–
R6
R3
R4
Q21
Q22
Q23
Q24
R1A
R2B1
R1B
Q7
Q3
Q6
Q1
Q4
Q2
Q27
Q26
Q25
C1
Q9
Q10
Q11
Q12
C2
(OPTIONAL
NULL)
Q13
Q14
Q17
Q16
Q15
Q18
Q20
Q19
R10
R9
Q8
NONINVERTING
INPUT
INVERTING
INPUT
Figure 2. Simplified Schematic


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