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74LVTH322245 Fiches technique(PDF) 1 Page - NXP Semiconductors |
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74LVTH322245 Fiches technique(HTML) 1 Page - NXP Semiconductors |
1 / 12 page 1. General description The 74LVTH322245 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. The 74LVTH322245 is designed with 30 Ω series resistance in both the HIGH and LOW states of the output. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus receivers/transmitters. The 74LVTH322245 is a 32-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features four output enable (nOE) inputs for easy cascading and four send/receive (nDIR) inputs for direction control. Pin nOE controls the outputs so that the buses are effectively isolated. Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs. 2. Features I 32-bit bidirectional bus interface I 3-state buffers I Output capability: +12 mA and −12 mA I TTL input and output switching levels I Input and output interface capability to systems at 5 V supply I Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs I Live insertion and extraction permitted I Outputs include series resistance of 30 Ω making external resistors unnecessary I Power-up 3-state I No bus current loading when output is tied to 5 V bus I Latch-up protection: N JESD78 Class II level A exceeds 500 mA I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V 3. Ordering information 74LVTH322245 3.3 V 32-bit bus transceiver with 30 Ω termination resistors; 3-state Rev. 01 — 24 January 2007 Product data sheet Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVTH322245EC −40 °C to +125 °C LFBGA96 plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 × 5.5 × 1.05 mm SOT536-1 |
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