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74AHC125D Fiches technique(PDF) 3 Page - NXP Semiconductors |
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74AHC125D Fiches technique(HTML) 3 Page - NXP Semiconductors |
3 / 15 page 74AHC_AHCT125_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 11 January 2008 3 of 15 NXP Semiconductors 74AHC125; 74AHCT125 Quad buffer/line driver; 3-state 5.2 Pin description 6. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 2. Pin description Symbol Pin Description 1OE 1 output enable input (active LOW) 1A 2 data input 1Y 3 data output 2OE 4 output enable input (active LOW) 2A 5 data input 2Y 6 data output GND 7 ground (0 V) 3Y 8 data output 3A 9 data input 3OE 10 output enable input (active LOW) 4Y 11 data output 4A 12 data input 4OE 13 output enable input (active LOW) VCC 14 supply voltage Table 3. Function table[1] Control Input Output nOE nA nY LLL HH HX Z Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +7.0 V VI input voltage −0.5 +7.0 V IIK input clamping current VI < −0.5 V [1] −20 - mA IOK output clamping current VO < −0.5 V or VO >VCC + 0.5 V [1] - ±20 mA IO output current VO = −0.5 V to (VCC + 0.5 V) - ±25 mA ICC supply current - 75 mA IGND ground current −75 - mA |
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