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74AUP1G08GW Fiches technique(PDF) 2 Page - NXP Semiconductors |
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74AUP1G08GW Fiches technique(HTML) 2 Page - NXP Semiconductors |
2 / 17 page 74AUP1G08_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 29 June 2006 2 of 17 Philips Semiconductors 74AUP1G08 Low-power 2-input AND gate 3. Ordering information 4. Marking 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G08GW −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 74AUP1G08GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm SOT886 74AUP1G08GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1 × 0.5 mm SOT891 Table 2. Marking Type number Marking code 74AUP1G08GW pE 74AUP1G08GM pE 74AUP1G08GF pE Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram mna113 B A Y 2 1 4 mna114 2 4 & 1 mna221 A B Y |
Numéro de pièce similaire - 74AUP1G08GW |
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Description similaire - 74AUP1G08GW |
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