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TC74HC173AP Fiches technique(PDF) 6 Page - Toshiba Semiconductor |
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TC74HC173AP Fiches technique(HTML) 6 Page - Toshiba Semiconductor |
6 / 9 page TC74HC173AP/AF 2007-10-01 6 AC Characteristics (input: tr = tf = 6 ns) Test Condition Ta = 25°C Ta = −40~85°C Characteristics Symbol CL (pF) VCC (V) Min Typ. Max Min Max Unit Output transition time tTLH tTHL ⎯ 50 2.0 4.5 6.0 ⎯ ⎯ ⎯ 20 6 5 60 12 10 ⎯ ⎯ ⎯ 75 15 13 ns 50 2.0 4.5 6.0 ⎯ ⎯ ⎯ 50 15 12 115 23 20 ⎯ ⎯ ⎯ 145 29 25 Propagation delay time (CK-Q) tpLH tpHL ⎯ 150 2.0 4.5 6.0 ⎯ ⎯ ⎯ 65 20 16 155 31 26 ⎯ ⎯ ⎯ 195 39 33 ns 50 2.0 4.5 6.0 ⎯ ⎯ ⎯ 50 15 12 115 23 20 ⎯ ⎯ ⎯ 145 29 25 Propagation delay time (CLR-Q) tpHL ⎯ 150 2.0 4.5 6.0 ⎯ ⎯ ⎯ 63 20 16 155 31 26 ⎯ ⎯ ⎯ 195 39 33 ns 50 2.0 4.5 6.0 ⎯ ⎯ ⎯ 50 15 12 115 23 20 ⎯ ⎯ ⎯ 145 29 25 Output enable time tpZL tpZH RL = 1 kΩ 150 2.0 4.5 6.0 ⎯ ⎯ ⎯ 63 20 16 115 31 26 ⎯ ⎯ ⎯ 195 39 33 ns Output disable time tpLZ tpHZ RL = 1 kΩ 50 2.0 4.5 6.0 ⎯ ⎯ ⎯ 36 17 15 135 27 23 ⎯ ⎯ ⎯ 170 34 29 ns Maximum clock frequency fmax ⎯ 50 2.0 4.5 6.0 9 43 51 20 67 84 ⎯ ⎯ ⎯ 7 34 40 ⎯ ⎯ ⎯ MHz Input capacitance CIN ⎯ ⎯ 5 10 ⎯ 10 pF Output capacitance COUT ⎯ ⎯ 10 ⎯ ⎯ ⎯ pF Power dissipation capacitance CPD (Note) ⎯ ⎯ 45 ⎯ ⎯ ⎯ pF Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD・VCC・fIN + ICC/4 (per flip flop) And the total CPD when n pcs of flip flop operate be gained by the following equation: CPD (total) = 28 + 17・n |
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