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CXK79M72C164GB Fiches technique(PDF) 10 Page - Sony Corporation |
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CXK79M72C164GB Fiches technique(HTML) 10 Page - Sony Corporation |
10 / 28 page SONY® ΣRAM CXK79M72C164GB / CXK79M36C164GB Preliminary 18Mb 1x1Dp, HSTL, rev 1.3 10 / 28 June 19, 2003 •DC Recommended Operating Conditions (VSS =0V, TA =0 to 70 oC) 1. The peak-to-peak AC component superimposed on VREF may not exceed 5% of the DC component. 2. VIH (max) AC = VDDQ + 0.9V for pulse widths less than one-quarter of the cycle time (tCYC/4). 3. VIL (min) AC = -0.9V for pulse widths less than one-quarter of the cycle time (tCYC/4). 4. If only the CK Input Clock is used, CK must be connected to VREF, and CK must meet the VIH and VIL parameters. 5. VKIN,VDIF,and VCM apply only if differential Input Clocks are used. Parameter Symbol Min Typ Max Units Notes Supply Voltage VDD 1.7 1.8 1.95 V Output Supply Voltage VDDQ 1.4 --- VDD V Input Reference Voltage VREF VDDQ/2 - 0.1 VDDQ/2 VDDQ/2 + 0.1 V 1 Input High Voltage (Address, Control, Data) VIH VREF +0.2 --- VDDQ +0.3 V 2 Input Low Voltage (Address, Control, Data) VIL -0.3 --- VREF -0.2 V 3 Input High Voltage (EP2, EP3, MCH) VMIH VREF +0.3 --- VDD +0.3 V Input Low Voltage (EP2, EP3, MCL) VMIL -0.3 --- VREF -0.3 V Clock Input Signal Voltage VKIN -0.3 --- VDDQ + 0.3 V 2,3,4,5 Clock Input Differential Voltage VDIF 0.4 --- VDDQ +0.6 V 5 Clock Input Common Mode Voltage VCM VDDQ/2 - 0.1 VDDQ/2 VDDQ/2 + 0.1 V 5 |
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