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74AUP1G00GW Fiches technique(PDF) 7 Page - NXP Semiconductors |
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74AUP1G00GW Fiches technique(HTML) 7 Page - NXP Semiconductors |
7 / 16 page 74AUP1G00_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 29 June 2006 7 of 16 Philips Semiconductors 74AUP1G00 Low-power 2-input NAND gate 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8 Symbol Parameter Conditions Min Typ [1] Max Unit Tamb = 25 °C; CL = 5 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A or B to Y see Figure 7 VCC = 0.8 V - 17.5 - ns VCC = 1.1 V to 1.3 V 2.5 5.3 11.0 ns VCC = 1.4 V to 1.6 V 2.0 3.8 6.8 ns VCC = 1.65 V to 1.95 V 1.6 3.1 5.3 ns VCC = 2.3 V to 2.7 V 1.3 2.5 4.0 ns VCC = 3.0 V to 3.6 V 1.0 2.2 3.6 ns Tamb = 25 °C; CL = 10 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A or B to Y see Figure 7 VCC = 0.8 V - 21.0 - ns VCC = 1.1 V to 1.3 V 2.4 6.1 13.0 ns VCC = 1.4 V to 1.6 V 2.4 4.4 7.9 ns VCC = 1.65 V to 1.95 V 2.0 3.7 6.2 ns VCC = 2.3 V to 2.7 V 1.4 3.0 4.7 ns VCC = 3.0 V to 3.6 V 1.3 2.8 4.3 ns Tamb = 25 °C; CL = 15 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A or B to Y see Figure 7 VCC = 0.8 V - 24.5 - ns VCC = 1.1 V to 1.3 V 3.4 6.9 14.8 ns VCC = 1.4 V to 1.6 V 2.8 5.0 8.9 ns VCC = 1.65 V to 1.95 V 2.0 4.1 7.0 ns VCC = 2.3 V to 2.7 V 1.7 3.5 5.3 ns VCC = 3.0 V to 3.6 V 1.6 3.2 4.9 ns Tamb = 25 °C; CL = 30 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A or B to Y see Figure 7 VCC = 0.8 V - 34.8 - ns VCC = 1.1 V to 1.3 V 4.6 9.2 20.1 ns VCC = 1.4 V to 1.6 V 3.0 6.5 11.8 ns VCC = 1.65 V to 1.95 V 2.6 5.4 9.3 ns VCC = 2.3 V to 2.7 V 2.4 4.6 7.1 ns VCC = 3.0 V to 3.6 V 2.3 4.3 6.5 ns |
Numéro de pièce similaire - 74AUP1G00GW |
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Description similaire - 74AUP1G00GW |
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