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74LVC1G125GF Fiches technique(PDF) 1 Page - NXP Semiconductors

No de pièce 74LVC1G125GF
Description  Bus buffer/line driver; 3-state
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

74LVC1G125GF Fiches technique(HTML) 1 Page - NXP Semiconductors

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1.
General description
The 74LVC1G125 provides one non-inverting buffer/line driver with 3-state output.
The 3-state output is controlled by the output enable input (OE). A HIGH-level at pin OE
causes the output to assume a high-impedance OFF-state.
The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
2.
Features
I Wide supply voltage range from 1.65 V to 5.5 V
I High noise immunity
I ±24 mA output drive (VCC = 3.0 V)
I CMOS low power consumption
I Latch-up performance exceeds 250 mA
I Direct interface with TTL levels
I Inputs accept voltages up to 5 V
I Multiple package options
I Specified from −40 °Cto+85 °C and −40 °C to +125 °C
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Complies with JEDEC standard:
N JESD8-7 (1.65 V to 1.95 V)
N JESD8-5 (2.3 V to 2.7 V)
N JESD8-B/JESD36 (2.7 V to 3.6 V)
74LVC1G125
Bus buffer/line driver; 3-state
Rev. 07 — 30 August 2007
Product data sheet


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