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LF3321 Fiches technique(PDF) 7 Page - LOGIC Devices Incorporated

No de pièce LF3321
Description  Horizontal Digital Image Filter Improved Performance
Download  28 Pages
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Fabricant  LODEV [LOGIC Devices Incorporated]
Site Internet  http://www.logicdevices.com
Logo LODEV - LOGIC Devices Incorporated

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DEVICES INCORPORATED
LF3321
Horizontal Digital Image Filter
Improved Performance
LOGIC Devices Incorporated
7
Feb 5, 2003 LDS.3321-A
Video Imaging Products
Three cascade ports are provided to allow cascading of multiple devices for more filter taps (see Figure
8). COUT11-0 of one device should be connected to DIN11-0 of another device. ROUT11-0 of one
device should be connected to RIN11-0 of another device. As many LF3321s as desired may be cascaded
together. However, the outputs of the LF3321s must be added together with external adders.
Bit 0 of Configuration Register 5 determines how the device will send data to the reverse data path when
multiple LF3321s are cascaded together. If a LF3321 is the last in the cascade chain, Bit 0 of Configuration
Register 5 should be set to a “0”. This will cause the data from the end of the forward data path to be routed
to the beginning of the reverse data path based on how the filter is configured (even/odd number of taps or
interleave mode). If a LF3321 is not the last in the cascade chain, Bit 0 of Configuration Register 5 should
be set to a “1”. This will cause RIN11-0 to feed data to the reverse data path. When not cascading, Bit 0 of
Configuration Register 5 should be set to a “0”.
Special data routing circuitry is used to feed the COUT and ROUT output registers. The data routing
circuitry is required to correctly align data in the forward and reverse data paths as data passes from one
LF3321 to another. The COUT and ROUT registers are loaded with data which is two clock cycles behind
the current output of the I/D Register just before the ROUT or COUT register. This correctly accounts for the
extra delays added to the forward and reverse data paths by the input/output cascade registers.
The Output Adder adds the Filter A and B outputs together when the device is in Single Filter Mode. If 24-bit
data and 12-bit coefficients or 12-bit data and 24-bit coefficients are desired, the LF3321 can facilitate this
by scaling the Filter B output by 2-12 before adding it to the Filter A output. Bit 3 in Configuration Register 5
determines if the Filter B output is scaled before being added to the Filter A output.
Functional Description
Cascading
DIN
I/D
REGISTERS
I/D
REGISTERS
FILTER
A
FILTER
B
RSL
CIRCUIT
RIN
COUT
ROUT
DIN
I/D
REGISTERS
I/D
REGISTERS
FILTER
A
FILTER
B
RSL
CIRCUIT
COUT
I/D
REGISTERS
I/D
REGISTERS
FILTER
A
FILTER
B
RSL
CIRCUIT
COUT
I/D
REGISTERS
I/D
REGISTERS
FILTER
A
FILTER
B
RSL
CIRCUIT
LF3320
RIN
ROUT
DIN
DIN
ROUT
RIN
LF3320
LF3320
LF3320
LF3347
12
16
16
16
16
RSL
CIRCUIT
DATA OUT
128 TAP RESULT
16
25
25
Figure 8. Multiple LF3321 Cascaded Together
Output Adder


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