3

AT29C010A

0394E–FLASH–11/02

The sector address must be valid during each high to low transition of WE (or CE). A0 to

A6 specify the byte address within the sector. The bytes may be loaded in any order;

sequential loading is not required. Once a programming operation has been initiated,

and for the duration of t

SOFTWARE DATA PROTECTION: A software controlled data protection feature is

available on the AT29C010A. Once the software protection is enabled a software algo-

rithm must be issued to the device before a program may be performed. The software

protection feature may be enabled or disabled by the user; when shipped from Atmel,

the software data protection feature is disabled. To enable the software data protection,

a series of three program commands to specific addresses with specific data must be

performed. After the software data protection is enabled the same three program com-

mands must begin each program cycle in order for the programs to occur. All software

program commands must obey the sector program timing specifications. Once set, the

software data protection feature remains active unless its disable command is issued.

Power transitions will not reset the software data protection feature, however the soft-

ware feature will guard against inadvertent program cycles during power transitions.

Once set, software data protection will remain active unless the disable command

sequence is issued.

After setting SDP, any attempt to write to the device without the 3-byte command

sequence will start the internal write timers. No data will be written to the device; how-

After the software data protection’s 3-byte command code is given, a byte load is per-

formed by applying a low pulse on the WE or CE input with CE or WE low (respectively)

and OE high. The address is latched on the falling edge of CE or WE, whichever occurs

last. The data is latched by the first rising edge of CE or WE. The 128 bytes of data must

be loaded into each sector by the same procedure as outlined in the program section

under device operation.

HARDWARE DATA PROTECTION: Hardware features protect against inadvertent pro-

programming; (c) Program inhibit – holding any one of OE low, CE high or WE high

inhibits program cycles; and (d) Noise filter—pulses of less than 15 ns (typical) on the

WE or CE inputs will not initiate a program cycle.

PRODUCT IDENTIFICATION: The product identification mode identifies the device and

manufacturer as Atmel. It may be accessed by hardware or software operation. The

hardware operation mode can be used by an external programmer to identify the correct

programming algorithm for the Atmel product. In addition, users may wish to use the

software product identification mode to identify the part (i.e. using the device code), and

have the system software use the appropriate sector size for program operations. In this

manner, the user can have a common board design for 256K to 4-megabit densities

and, with each density’s sector size in a memory map, have the system software apply

the appropriate sector size.

For details, see Operating Modes (for hardware operation) or Software Product Identifi-

cation. The manufacturer and device code is the same for both modes.

DATA POLLING: The AT29C010A features DATA polling to indicate the end of a pro-

gram cycle. During a program cycle an attempted read of the last byte loaded will result

in the complement of the loaded data on I/O7. Once the program cycle has been com-

pleted, true data is valid on all outputs and the next cycle may begin. DATA polling may

begin at any time during the program cycle.