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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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FM25L512-DG Fiches technique(PDF) 11 Page - Ramtron International Corporation |
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FM25L512-DG Fiches technique(HTML) 11 Page - Ramtron International Corporation |
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11 / 13 page  FM25L512 Rev. 1.2 Aug. 2007 Page 11 of 13 Serial Data Bus Timing /Hold Timing CS SCK SO HOLD tHS tHH tHZ tLZ tHS tHH Power Cycle Timing Power Cycle Timing (TA = -40° C to + 85° C, VDD = 3.0V to 3.6V) Symbol Parameter Min Max Units Notes tPU Power Up (VDD min) to First Access (/CS low) 10 - ms tPD Last Access (/CS high) to Power Down (VDD min) 0 - µs tVR VDD Rise Time 50 - µs/V 1,2 tVF VDD Fall Time (applies only to VDD levels below 2V) 1 - ms/V 1,2 Notes 1. This parameter is characterized and not 100% tested. 2. Slope measured at any point on VDD waveform. |
Numéro de pièce similaire - FM25L512-DG |
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Description similaire - FM25L512-DG |
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