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TSL2560T Fiches technique(PDF) 10 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
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TSL2560T Fiches technique(HTML) 10 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
10 / 38 page TSL2560, TSL2561 LIGHT-TO-DIGITAL CONVERTER TAOS059K − APRIL 2007 10 r r Copyright E 2007, TAOS Inc. The LUMENOLOGY r Company www.taosinc.com When an SMBus Block Write or Block Read is initiated (see description of COMMAND Register), the byte following the COMMAND byte is ignored but is a requirement of the SMBus specification. This field contains the byte count (i.e. the number of bytes to be transferred). The TSL2560 (SMBus) device ignores this field and extracts this information by counting the actual number of bytes transferred before the Stop condition is detected. When an I2C Write or I2C Read (Combined Format) is initiated, the byte count is also ignored but follows the SMBus protocol specification. Data bytes continue to be transferred from the TSL2561 (I2C) device to Master until a NACK is sent by the Master. The data formats supported by the TSL2560 and TSL2561 devices are: D Master transmitter transmits to slave receiver (SMBus and I2C): − The transfer direction in this case is not changed. D Master reads slave immediately after the first byte (SMBus only): − At the moment of the first acknowledgment (provided by the slave receiver) the master transmitter becomes a master receiver and the slave receiver becomes a slave transmitter. D Combined format (SMBus and I2C): − During a change of direction within a transfer, the master repeats both a START condition and the slave address but with the R/W bit reversed. In this case, the master receiver terminates the transfer by generating a NACK on the last byte of the transfer and a STOP condition. For a complete description of SMBus protocols, please review the SMBus Specification at http://www.smbus.org/specs. For a complete description of I2C protocols, please review the I2C Specification at http://www.semiconductors.philips.com. Wr 7 Data Byte Slave Address S 1 AP A 8 11 1 1 XX A Acknowledge (this bit position may be 0 for an ACK or 1 for a NACK) P Stop Condition Rd Read (bit value of 1) S Start Condition Sr Repeated Start Condition Wr Write (bit value of 0) X Shown under a field indicates that that field is required to have a value of X ... Continuation of protocol Master-to-Slave Slave-to-Master Figure 7. SMBus and I2C Packet Protocol Element Key |
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