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LC877816A Fiches technique(PDF) 9 Page - Sanyo Semicon Device |
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LC877816A Fiches technique(HTML) 9 Page - Sanyo Semicon Device |
9 / 21 page LC877816A No.A0635-9/21 Port Output Types Port form and pull-up resistor options are shown in the following table. Port status can be read even when port is set to output mode. Port Name Option selected in units of Option type Output type Pull-up resistor 1 CMOS Programmable(Note 1) P00 to P07 1 bit 2 Nch-open drain No 1 CMOS Programmable P10 to P17 1 bit 2 Nch-open drain Programmable P70 - No Nch-open drain Programmable P71 to P73 - No CMOS Programmable 1 CMOS, 2 Pch-Open Drain S16(PC0) to S23(PC7) - 3 Nch-Open Drain No Note 1: Attachment of Port0 programmable pull-up resistors is controllable in nibble units (P00 to 03, P04 to 07). *1: Connect as follows to reduce noise on VDD. VSS1 and VSS2 must be connected together and grounded. *2: The power supply for the internal memory is VDC. VDD1 and VDD2 are used as the power supply for ports. When VDD1 and VDD2 are not backed up, the port level does not become “H” even if the port latch is in the “H” level. Therefore, when VDD1 and VDD2 are not backed up and the port latch is “H” level, the port level is unstable in the HOLD mode, and the back up time becomes shorter because the through current runs from VDD to GND in the input buffer. If VDD1 and VDD2 are not backed up, output “L” by the program or pull the port to “L” by the external circuit in the HOLD mode so that the port level becomes “L” level and unnecessary current consumption is prevented. LSI VDD1 VDD2 VSS2 VSS1 Power supply V1 V2 V3 VDC CUP1 CUP2 Back up capacitors *2 |
Numéro de pièce similaire - LC877816A |
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Description similaire - LC877816A |
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