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SN74LV08APWLE Fiches technique(PDF) 1 Page - Texas Instruments |
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SN74LV08APWLE Fiches technique(HTML) 1 Page - Texas Instruments |
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1 / 18 page  SN54LV08A, SN74LV08A QUADRUPLE 2INPUT POSITIVEAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C D Support Mixed-Mode Voltage Operation on All Ports D Ioff Supports Partial-Power-Down Mode Operation D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1B 1Y 2A 2B 2Y GND VCC 4B 4A 4Y 3B 3A 3Y SN54LV08A ...J OR W PACKAGE SN74LV08A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 32 1 20 19 910 11 1213 4 5 6 7 8 18 17 16 15 14 4A NC 4Y NC 3B 1Y NC 2A NC 2B SN54LV08A . . . FK PACKAGE (TOP VIEW) NC − No internal connection SN74LV08A . . . RGY PACKAGE (TOP VIEW) 114 78 2 3 4 5 6 13 12 11 10 9 4B 4A 4Y 3B 3A 1B 1Y 2A 2B 2Y description/ordering information These quadruple 2-input positive-AND gates are designed for 2-V to 5.5-V VCC operation. The ’LV08A devices perform the Boolean function Y + A • Bor Y + A ) B in positive logic. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING QFN − RGY Reel of 1000 SN74LV08ARGYR LV08A SOIC − D Tube of 50 SN74LV08AD LV08A SOIC − D Reel of 2500 SN74LV08ADR LV08A SOP − NS Reel of 2000 SN74LV08ANSR 74LV08A −40 °C to 85°C SSOP − DB Reel of 2000 SN74LV08ADBR LV08A −40 C to 85 C Tube of 90 SN74LV08APW TSSOP − PW Reel of 2000 SN74LV08APWR LV08A TSSOP − PW Reel of 250 SN74LV08APWT LV08A TVSOP − DGV Reel of 2000 SN74LV08ADGVR LV08A CDIP − J Tube of 25 SNJ54LV08AJ SNJ54LV08AJ −55 °C to 125°C CFP − W Tube of 150 SNJ54LV08AW SNJ54LV08AW −55 C to 125 C LCCC − FK Tube of 55 SNJ54LV08AFK SNJ54LV08AFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2005, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
Numéro de pièce similaire - SN74LV08APWLE |
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Description similaire - SN74LV08APWLE |
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