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UAA2080T Fiches technique(PDF) 19 Page - NXP Semiconductors

No de pièce UAA2080T
Description  Advanced pager receiver
Download  44 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

UAA2080T Fiches technique(HTML) 19 Page - NXP Semiconductors

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1996 Jan 15
19
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
FUNCTIONAL DESCRIPTION
The complete circuit consists of the following functional
blocks as shown in Figs 1 to 6.
Radio frequency amplifier
The RF amplifier is an emitter-coupled pair driving a
balanced cascode stage, which drives an external
balanced tuned circuit. Its bias current is set by an external
300
Ω resistor R1 to typically 770 µA. With this bias
current the optimum source resistance is 1.3 k
Ω at VHF
and 1.0 k
Ω at UHF. At 930 MHz a higher bias current is
required to achieve optimum gain. A value of 120
Ω is
used for R1, which corresponds with a bias current of
approximately 1.3 mA and an optimum source resistance
of approximately 600
Ω.The capacitors C1 and C2
transform a 50
Ω source resistance to this optimum value.
The output drives a tuned circuit with capacitive divider
(C7, C8 and C9) to provide maximum power transfer to the
phase-splitting network and the mixers.
Mixers
The double balanced mixers consist of common base
input stages and upper switching stages driven from the
frequency multiplier. The 300
Ω input impedance of each
mixer acts together with external components (C10, C11;
L4, L5 respectively) as phase shifter/power splitter to
provide a differential phase shift of 90 degrees between
the I channel and the Q channel. At 930 MHz all external
phase shifter components are inductive (L10, L11; L4, L5).
Oscillator
The oscillator is based on a transistor in common collector
configuration. It is followed by a cascode stage driving a
tuned circuit which provides the signal for the frequency
multiplier. The oscillator bias current (typically 250
µA) is
determined by the 1.8 k
Ω external resistor R5.
The oscillator frequency is controlled by an external 3rd
overtone crystal in parallel resonance mode. External
capacitors between base and emitter (C17) and from
emitter to ground (C16) make the oscillator transistor
appear as having a negative resistance for small signals;
this causes the oscillator to start. Inductance L9 connected
in parallel with capacitor C16 to the emitter of the oscillator
transistor prevents oscillation at the fundamental
frequency of the crystal.
The resonant circuit at output pin OSC selects the second
harmonic of the oscillator frequency. In other applications
a different multiplication factor may be chosen.
At 930 MHz an external oscillator circuit is required to
provide sufficient local oscillator signal for the frequency
multiplier.
Frequency multiplier
The frequency multiplier is an emitter-coupled pair driving
an external balanced tuned circuit. Its bias current is set by
external resistor R4 to typically 190
µA (173 MHz), 350 µA
(470 MHz) and 1 mA (930 MHz). The oscillator signal is
internally AC coupled to one input of the emitter-coupled
pair while the other input is internally grounded via a
capacitor. The frequency multiplier output signal between
pins VO1MUL and VO2MUL drives the upper switching
stages of the mixers. The bias voltage on pins VO1MUL
and VO2MUL is set by external resistor R3 to allow
sufficient voltage swing at the mixer outputs. The value of
R3 depends on the operating frequency: 1.5 k
(173 MHz), 820
Ω (470 MHz) and 330 Ω (930 MHz).
Low noise amplifiers, active filters and gyrator filters
The low noise amplifiers ensure that the noise of the
following stages does not affect the overall noise figure.
The following active filters before the gyrator filters reduce
the levels of large signals from adjacent channels. Internal
AC couplings block DC offsets from the gyrator filter
inputs.
The gyrator filters implement the transfer function of a 7th
order elliptic filter. Their cut-off frequencies are determined
by the 47 k
Ω external resistor R2 between pins RGYR and
COM. The gyrator filter output signals are available on IF
test pins TPI and TPQ.
Limiters
The gyrator filter output signals are amplified in the limiter
amplifiers to obtain IF signals with removed amplitude
information.
Demodulator
The limiter amplifier output signals are fed to the
demodulator. The demodulator output DO is going LOW or
HIGH depending upon which of the input signals has a
phase lead.


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