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FAN5350UCX Fiches technique(PDF) 3 Page - Fairchild Semiconductor |
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FAN5350UCX Fiches technique(HTML) 3 Page - Fairchild Semiconductor |
3 / 15 page © 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5350 Rev. 1.0.1 3 Pin Configurations B2 A3 C1 C3 VIN SW EN GND FB A1 B2 A3 A1 C3 C1 GND SW FB VIN EN Figure 4. WLCSP - Bumps Facing Down Figure 5. WLCSP - Bumps Facing Up AGND FB SW VIN PGND EN 1 6 2 5 3 4 P1 (GND) Figure 6. 3x3mm MLP - Leads Facing Down Pin Definitions WLCSP Pin # Name Description A1 VIN Power Supply Input. A3 GND Ground Pin. Signal and power ground for the part. C1 EN Enable Pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.2V. Do not leave this pin floating. C3 FB Feedback Analog Input. Connect directly to the output capacitor. B2 SW Switching Node. Connection to the internal PFET switch and NFET synchronous rectifier. MLP Pin # Name Description 1 PGND Power Ground Pin. Power stage ground. Connect PGND and AGND together via the board ground plane. 2 AGND Analog Ground Pin. Signal ground for the part. 3 FB Feedback Analog Input. Connect directly to the output capacitor. 4 EN Enable Pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.2V. Do not leave this pin floating. 5 SW Switching Node. Connection to the internal PFET switch and NFET synchronous rectifier. 6 VIN Power Supply Input. |
Numéro de pièce similaire - FAN5350UCX |
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Description similaire - FAN5350UCX |
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