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TDA9143 Fiches technique(PDF) 5 Page - NXP Semiconductors

No de pièce TDA9143
Description  I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor
Download  40 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9143 Fiches technique(HTML) 5 Page - NXP Semiconductors

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1996 Jan 17
5
Philips Semiconductors
Preliminary specification
I2C-bus controlled, alignment-free
PAL/NTSC/SECAM decoder/sync processor
TDA9143
PINNING
SYMBOL
PIN
DESCRIPTION
−(R−Y)
1
output signal for
−(R−Y)
−(B−Y)
2
output signal for
−(B−Y)
Uin
3
chrominance U input
Vin
4
chrominance V input
SCL
5
serial clock input
SDA
6
serial data input/output
VCC
7
positive supply voltage
DEC
8
digital supply decoupling
DGND
9
digital ground
SC
10
sandcastle output
VA
11
vertical acquisition
synchronization pulse
Yout
12
luminance output
Vout
13
chrominance V output
Uout
14
chrominance U output
I/O PORT
15
input/output port
O PORT/LLC
16
output port/line-locked clock
output
CLP/HA
17
clamping pulse/HA
synchronization pulse
input/output
F
18
fast switch select input
B
19
BLUE input
G
20
GREEN input
R
21
RED input
ADDR (CVBS)
22
I2C-bus address input (CVBS
output)
Fscomb
23
comb filter status input/output
HPLL
24
horizontal PLL filter
C
25
chrominance input
Y/CVBS
26
luminance/CVBS input
AGND
27
analog ground
FILTref
28
filter reference decoupling
CPLL
29
colour PLL filter
XTAL
30
reference crystal input
XTAL2
31
second crystal input
SECref
32
SECAM reference decoupling
Fig.2 Pin configuration.
handbook, halfpage
TDA9143
MGE038
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
−(B−Y)
−(R−Y)
Uin
Vin
SCL
SDA
VCC
DEC
DGND
SC
VA
Yout
Vout
Uout
SECref
XTAL2
XTAL
CPLL
AGND
Y/CVBS
FILTref
C
HPLL
Fscomb
ADDR (CVBS)
R
G
B
I/O PORT
O PORT/LLC
F
CLP/HA


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