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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TMP102 Fiches technique(PDF) 8 Page - Burr-Brown (TI) |
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TMP102 Fiches technique(HTML) 8 Page - Burr-Brown (TI) |
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8 / 19 page  www.ti.com Startup Startof Conversion Delay (1) NOTE:(1)DelayissetbyCR1andCR0. 26ms 26ms Measured Temperature T HIGH T LOW TMP102 ALERTPIN (ComparatorMode) POL=0 TMP102 ALERTPIN (InterruptMode) POL=0 TMP102 ALERTPIN (ComparatorMode) POL=1 TMP102 ALERTPIN (InterruptMode) POL=1 Read Read Time Read SHUTDOWN MODE (SD) FAULT QUEUE (F1/F0) THERMOSTAT MODE (TM) POLARITY (POL) TMP102 SBOS397 – AUGUST 2007 After power-up or general-call reset, the TMP102 immediately starts a conversion, as shown in Figure 9. The first result is available after 26ms (typical). The active quiescent current during conversion is 40 μA (typical at +27 °C). The quiescent current during delay is 2.2 μA (typical at +27 °C). Figure 9. Conversion Start Figure 10. Output Transfer Function Diagrams The Shutdown mode bit saves maximum power by shutting down all device circuitry other than the serial interface, reducing current consumption to typically less than 0.5 μA. Shutdown mode is enabled when the SD bit is '1'; the device shuts down when current A fault condition exists when the measured conversion is completed. When SD is equal to '0', temperature exceeds the user-defined limits set in the device maintains a continuous conversion state. the THIGH and TLOW registers. Additionally, the number of fault conditions required to generate an alert may be programmed using the fault queue. The fault queue is provided to prevent a false alert as a The Thermostat mode bit indicates to the device result of environmental noise. The fault queue whether to operate in Comparator mode (TM = 0) or requires consecutive fault measurements in order to Interrupt mode (TM = 1). For more information on trigger the alert function. Table 9 defines the number comparator and interrupt modes, see the High- and of measured faults that may be programmed to Low-Limit Registers section. trigger an alert condition in the device. For THIGH and TLOW register format and byte order, see the High- and Low-Limit Registers section. The Polarity bit allows the user to adjust the polarity of the ALERT pin output. If POL = 0, the ALERT pin Table 9. TMP102 Fault Settings will be active low, as shown in Figure 10. For POL = F1 F0 CONSECUTIVE FAULTS 1, the ALERT pin will be active high, and the state of 0 0 1 the ALERT pin is inverted. 0 1 2 1 0 4 1 1 6 8 Submit Documentation Feedback |
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Description similaire - TMP102 |
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