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SN74CBT6845CDW Fiches technique(PDF) 2 Page - Texas Instruments |
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SN74CBT6845CDW Fiches technique(HTML) 2 Page - Texas Instruments |
2 / 20 page SN74CBT6845C 8BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS 5V BUS SWITCH WITH 2V UNDERSHOOT PROTECTION SCDS140 − OCTOBER 2003 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description/ordering information (continued) The SN74CBT6845C is an 8-bit bus switch with a single output-enable (OE) input. When OE is low, the 8-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the 8-bit bus switch is OFF, and a high-impedance state exists between the A and B ports. The B port is precharged to BIASV through the equivalent of a 10-k Ω resistor when OE is high, or if the device is powered down (VCC = 0 V). During insertion (or removal) of a card into (or from) an active bus, the card’s output voltage may be close to GND. When the connector pins make contact, the card’s parasitic capacitance tries to force the bus signal to GND, creating a possible glitch on the active bus. This glitching effect can be reduced by using a bus switch with precharged bias voltage (BIASV) of the bus switch equal to the input threshold voltage level of the receivers on the active bus. This method will ensure that any glitch produced by insertion (or removal) of the card will not cross the input threshold region of the receivers on the active bus, minimizing the effects of live-insertion noise. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING QFN − RGY Tape and reel SN74CBT6845CRGYR CT6845C SOIC − DW Tube SN74CBT6845CDW CBT6845C SOIC − DW Tape and reel SN74CBT6845CDWR CBT6845C SSOP − DB Tube SN74CBT6845CDB CT6845C −40 °C to 85°C SSOP − DB Tape and reel SN74CBT6845CDBR CT6845C −40 C to 85 C SSOP (QSOP) − DBQ Tape and reel SN74CBT6845CDBQR CBT6845C TSSOP − PW Tube SN74CBT6845CPW CT6845C TSSOP − PW Tape and reel SN74CBT6845CPWR CT6845C TVSOP − DGV Tape and reel SN74CBT6845CDGVR CT6845C † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUT INPUT/OUTPUT FUNCTION INPUT OE INPUT/OUTPUT A FUNCTION L B A port = B port H Z Disconnect B port = BIASV |
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