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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TDA8444AT Fiches technique(PDF) 6 Page - NXP Semiconductors |
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TDA8444AT Fiches technique(HTML) 6 Page - NXP Semiconductors |
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6 / 16 page  1999 Apr 29 6 Philips Semiconductors Product specification Octuple 6-bit DACs with I2C-bus TDA8444; TDA8444T; TDA8444AT The circuit will not react to other combinations of the 4 instruction bits I3 to I0 than 0 or F, but will still generate an acknowledge. The difference between instruction 0 and F is only important when more than one data byte is sent within one transmission. Instruction 0 causes the data bytes to be written into the DAC-latches with consecutive subaddresses starting with the subaddress given in the instruction byte (auto-increment of subaddress), while instruction F will cause a consecutive writing of the data bytes into the same DAC-latch whose subaddress was given in the instruction byte. In case of only one data byte the DAC-latch with the subaddress equal to the subaddress in the instruction byte will receive the data. Valid subaddresses are: 0H to 7H. The subaddresses correspond to DAC0 to DAC7. The Auto-Increment (AI) function of instruction 0, however, works on all possible subaddresses 0 to F in such a way that next to subaddress F, subaddress 0 will follow, and so on. The data will be latched into the DAC-latch on the positive-going edge of the acknowledge related clock pulse. The specification of the SCL and SDA I/O meets the I2C-bus specification. For protection against positive voltage pulses on pins 3 and 4, zener diodes are connected between these pins and VEE. This means that normal bus line voltage should not exceed 5.5 V. The address inputs A0, A1 and A2 can be easily programmed by either a connection to VEE (An = 0) or VCC (An = 1). If the inputs are left floating the result will be An = 1. VMAX The VMAX input gives a means of compressing the DAC output voltage swing. The maximum DAC output voltage will be equal to VMAX +VDAC(min), while the 6-bit resolution is maintained. This enables a higher voltage resolution for smaller output swings. DACs The DACs consist of a 6-bit data-latch, current switches and an opamp. The current sources connected to the switches have values with weights 20 to 25. The sum of the switched on currents is converted by the opamp into a voltage between approximately 0.5 and 10.5 V if VMAX =VCC = 12 V. The DAC outputs are short-circuit protected against VCC and VEE. Capacitive load on the DAC outputs should not exceed 2 nF in order to prevent possible oscillations at certain levels. The temperature coefficient for each of the outputs remains in all possible conditions well below 0.1 LSB per Kelvin. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). QUALITY SPECIFICATION In accordance with “SNW-FQ-611-E”. SYMBOL PARAMETER MIN. MAX. UNIT VCC supply voltage −0.5 +18 V ICC supply current −10 +40 mA P(max) maximum power dissipation − 500 mW Vi(n) input voltage −0.5 +5.9 V pins SDA and SCL −0.5 +5.9 V pins VMAX, A0 to A2 and DAC0 to DAC7 −0.5 VCC + 0.5 V In current in all pins except VCC and VEE −±10 mA Tstg storage temperature −65 +150 °C Tamb operating ambient temperature −20 +70 °C |
Numéro de pièce similaire - TDA8444AT |
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Description similaire - TDA8444AT |
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