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ST8004CDR Fiches technique(PDF) 9 Page - STMicroelectronics |
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ST8004CDR Fiches technique(HTML) 9 Page - STMicroelectronics |
9 / 26 page ST8004 Electrical characteristics 9/26 Table 9. Data lines (pins I/O, AUX1 AND AUX2 WITH 10 k Ω Pull-up resistor connected to VCC Internally (VDD = 3.3V, VDDP = 5V, fXTAL = 10MHz, unless otherwise noted. Typical values are to TA = 25°C) Symbol Parameter Test Conditions Min. Typ. Max. Unit VOH High level output voltage on data lines IOH = - 40µA 0.75 VCC VCC V No Load 0.9 VCC VCC+0.3 VOL Low level output voltage on data lines IOL = 1 mA 300 mV VIH High level input voltage on data lines 1.8 VCC V VIL Low level input voltage on data lines -0.3 0.8 V VINACTIVE Voltage on data lines when inactive No Load 0.1 V II/O = 1 mA 0.3 IEDGE Current from data lines when active pull-up is active VOH = 0.7 x VCC; CO = 80 pF -1 mA |IIH| Input leakage current when high VIH = VCC 10 µA IIL Low level input current VIL = 0 600 µA RPU(INT) Internal pull-up resistance to VCC 913 K Ω tT(DI) Input transition times From VIL max to VIH min 1 µs tT(DO) Output transition times CO = 80 pF, no DC load; 0.4 V to 70% from 0 to VCC 0.1 µs CI Input capacitance 10 pF Table 10. Data lines (pins I/OUC, AUX1UC AND AUX2UC with 10 k Ω Pull-up resistor connected to VDD internally (VDD = 3.3V, VDDP = 5V, fXTAL = 10MHz, unless otherwise noted.Typical values are to TA = 25°C) Symbol Parameter Test Conditions Min. Typ. Max. Unit VOH High Level Output Voltage IOH = - 40µA 0.75 VDD VDD V No Load 0.9 VDD VOL Low Level Output Voltage IOL = 1 mA 0 300 mV VIH High Level Input Voltage 0.7 VDD VDD V VIL Low Level Input Voltage 0 0.3 VDD V |ILIH| Input Leakage Current when high VIH = VDD 10 µA IIL Input Leakage Current when low VIL = 0 600 µA RPU(INT) Internal pull-up resistance to VDD 911 13 K Ω |
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