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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TDA8083 Fiches technique(PDF) 2 Page - NXP Semiconductors |
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TDA8083 Fiches technique(HTML) 2 Page - NXP Semiconductors |
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2 / 16 page  1999 Jul 28 2 Philips Semiconductors Product specification Satellite Demodulator and Decoder (SDD3) TDA8083 FEATURES • One chip Digital Video Broadcasting (DVB) (ETS300421) compliant demodulator and concatenated Viterbi and Reed-Solomon decoder with de-interleaver and de-randomizer • 3.3 V supply voltage • Relevant outputs are 5 V tolerant to ease interface to 5 V environment • Few external components for full application • On-chip crystal oscillator (4 MHz) and Phase-Locked Loop (PLL) for internal clock generation • Power-on reset module • QPSK/BPSK demodulator: – Different modulation schemes: Quadrature Phase Shift Keying (QPSK) and Binary Phase Shift Keying (BPSK) – Interpolator and internal anti-aliasing filter to handle variable symbol rates – Tuner Automatic Gain Control (AGC) control – Two on-chip matched 7-bit Analog-to-Digital Converters (ADCs) – Square-root raised-cosine Nyquist – Maximum symbol frequency of 30 Msymbols/s – Can be used at low channel Signal-to-Noise Ratio (S/R) – Internal full digital carrier recovery, clock recovery and AGC loops with programmable loop filters – Two carrier recovery loops enabling optimum phase noise suppression – S/R estimation. • Viterbi decoder: – Rate 1 ⁄2 convolutional code based – Constraint length K = 7 with G1 = 171oct and G2 = 133oct – Supported puncturing code rates: 1 ⁄2, 2⁄3, 3⁄4, 4⁄5, 5⁄6, 6 ⁄7, 7⁄8 and 8⁄9 – 4-bit ‘soft decision’ inputs for both I and Q – Truncation length of 144 – Automatic synchronization to detect puncturing rate and spectral inversion – Channel Bit Error Rate (BER) estimation from 10−2 to 10−8 – Differential decoding optional. • Reed-Solomon (RS) decoder: – (204, 188, T = 8) Reed-Solomon code – Automatic synchronization of bytes, transport packets and frames – Internal convolutional de-interleaving (I = 12; using internal memory) – De-randomizer based on Pseudo Random Binary Sequence (PRBS) – External indication of uncorrectable error (transport error indicator is set) – Indication of the number of lost blocks – Indication of the number of corrected blocks. • Interface: –I2C-bus interface initializes and monitors the demodulator and Forward Error Correction (FEC) decoder; a default mode is defined – 6-bit I/O expander for flexible access to and from the I2C-bus –I2C-bus configurable interrupt input – Switchable I2C-bus loop-through to suppress I2C-bus crosstalk in the tuner – Digital Satellite Equipment Control (DiSEqC) 1.X, tone burst generation and tone mode with a 22 or 44 kHz carrier – Parallel or serial output mode for MPEG transport stream (3-state mode also possible) – Standby mode for reduced power consumption. • Package: QFP100 • Boundary scan test. APPLICATIONS • Digital satellite TV: demodulation and FEC. |
Numéro de pièce similaire - TDA8083 |
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Description similaire - TDA8083 |
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