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TDA5051AT Fiches technique(PDF) 5 Page - NXP Semiconductors |
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TDA5051AT Fiches technique(HTML) 5 Page - NXP Semiconductors |
5 / 28 page 1999 May 31 5 Philips Semiconductors Product specification Home automation modem TDA5051A The DAC and the power stage are set in order to provide a maximum signal level of 122 dB µV (RMS) at the output. The output of the power stage (TXOUT) must always be connected to a decoupling capacitor, because of a DC level of 0.5VDD at this pin, which is present even when the device is not transmitting. This pin must also be protected against overvoltage and negative transient signals. The DC level of TXOUT can be used to bias a unipolar transient suppressor, as shown in the application diagram; see Fig.18. Direct connection to the mains is done through an LC network for low-cost applications. However, a HF signal transformer could be used when power-line insulation has to be performed. Reception mode The input signal received by the modem is applied to a wide range input amplifier with AGC ( −6 to +30 dB). This is basically for noise performance improvement and signal level adjustment, which ensures a maximum sensitivity of the ADC. An 8-bit conversion is then performed, followed by digital band-pass filtering, to meet the CISPR normalization and to comply with some additional limitations met in current applications. CAUTION In transmission mode, the receiving part of the circuit is not disabled and the detection of the transmitted signal is normally performed. In this mode, the gain chosen before the beginning of the transmission is stored, and the AGC is internally set to −6dB as long as DATAIN is LOW. Then, the old gain setting is automatically restored. After digital demodulation, the baseband data signal is made available after pulse shaping. The signal pin (RXIN) is a high-impedance input which has to be protected and DC decoupled for the same reasons as with pin TXOUT. The high sensitivity (82 dBµV) of this input requires an efficient 50 Hz rejection filter (realized by the LC coupling network), which also acts as an anti-aliasing filter for the internal digital processing; see Fig.18. Data format TRANSMISSION MODE The data input (DATAIN) is active LOW: this means that a burst is generated on the line (pin TXOUT) when DATAIN pin is LOW. Pin TXOUT is in a high-impedance state as long as the device is not transmitting. Successive logic 1s are treated in a Non-Return-to-Zero (NRZ) mode, see pulse shapes in Figs 8 and 9. RECEPTION MODE The data output (pin DATAOUT) is active LOW; this means that the data output is LOW when a burst is received. Pin DATAOUT remains LOW as long as a burst is received. Power-down mode Power-down input (pin PD) is active HIGH; this means that the power consumption is minimum when pin PD is HIGH. Now, all functions are disabled, except clock generation. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. SYMBOL PARAMETER MIN. MAX. UNIT VDD supply voltage 4.5 5.5 V fosc oscillator frequency − 12 MHz Tstg storage temperature −50 +150 °C Tamb ambient temperature −10 +80 °C Tj junction temperature − 125 °C |
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