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ST16C2450IJ44 Fiches technique(PDF) 10 Page - Exar Corporation

No de pièce ST16C2450IJ44
Description  2.97V TO 5.5V DUART
Download  30 Pages
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Fabricant  EXAR [Exar Corporation]
Site Internet  http://www.exar.com
Logo EXAR - Exar Corporation

ST16C2450IJ44 Fiches technique(HTML) 10 Page - Exar Corporation

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ST16C2450
xr
2.97V TO 5.5V DUART
REV. 4.0.1
10
2.10
Internal Loopback
The 2450 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 7 shows how the modem port signals are re-configured. Transmit data from the transmit shift register
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX pin is held at logic 1 or mark condition while RTS# and DTR# are de-asserted, and
CTS#, DSR# CD# and RI# inputs are ignored. Caution: the RX input must be held to a logic 1 during loopback
test else upon exiting the loopback test the UART may detect and report a false “break” signal.
FIGURE 7. INTERNAL LOOP BACK IN CHANNELS A AND B
TXA/TXB
RXA/RXB
RTSA#/RTSB#
MCR bit-4=1
VCC
VCC
Transmit Shift Register
(THR/FIFO)
Receive Shift Register
(RHR/FIFO)
CTSA#/CTSB
DTRA#/DTRB#
DSRA#/DSRB#
RIA#/RIB#
CDA#/CDB#
OP1#
OP2#
RTS#
CTS#
DTR#
DSR#
RI#
CD#
VCC
OP2A#/OP2B#
VCC


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