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ST16C2550 Fiches technique(PDF) 1 Page - Exar Corporation

No de pièce ST16C2550
Description  2.97V TO 5.5V DUART WITH 16-BYTE FIFO
Download  39 Pages
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Fabricant  EXAR [Exar Corporation]
Site Internet  http://www.exar.com
Logo EXAR - Exar Corporation

ST16C2550 Fiches technique(HTML) 1 Page - Exar Corporation

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Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
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ST16C2550
2.97V TO 5.5V DUART WITH 16-BYTE FIFO
OCTOBER 2004
REV. 4.4.0
GENERAL DESCRIPTION
The ST16C2550 (C2550) is a dual universal
asynchronous receiver and transmitter (UART). The
ST16C2550 is an improved version of the PC16550
UART with higher operating speed and faster access
times. The C2550 provides enhanced UART
functions with 16 byte FIFO’s, a modem control
interface, and data rates up to 4 Mbps. Onboard
status registers provide the user with error indications
and operational status. System interrupts and modem
control features may be tailored by external software
to meet specific user requirements. Independent
programmable baud rate generators are provided to
select transmit and receive clock rates from 50 bps to
4 Mbps. The Baud Rate Generator can be configured
for either crystal or external clock input. An internal
loopback capability allows onboard diagnostics. The
C2550 is available in a 44-pin PLCC and 48-pin
TQFP packages. The C2550 is fabricated in an
advanced CMOS process capable of operating from
2.97 volt to 5.5 volt power supply.
APPLICATIONS
Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls
FEATURES
Added feature in devices with top mark date code
of "A2 YYWW" and newer:
5 Volt Tolerant Inputs
Pin-to-pin compatible to Exar’s ST16C2450,
XR16L2550 and XR16L2750
Pin-to-pin compatible to TI’s TL16C752B on the 48-
TQFP package
Pin alike XR16C2850 48-TQFP package but
without CLK8/16, CLKSEL and HDCNTL inputs
2 independent UART channels
Up to 4 Mbps with external clock of 64 MHz
Up to 1.5 Mbps data rate with a 24 MHz crystal
frequency
16 byte Transmit FIFO to reduce the bandwidth
requirement of the external CPU
16 byte Receive FIFO with error tags to reduce
the bandwidth requirement of the external CPU
4 selectable Receive FIFO interrupt trigger
levels
Modem control signals (CTS#, RTS#, DSR#,
DTR#, RI#, CD#)
Programmable character lengths (5, 6, 7, 8)
with even, odd, or no parity
Crystal oscillator or external clock input
48-TQFP and 44-PLCC packages
FIGURE 1. ST16C2550 BLOCK DIAGRAM
XTAL1
XTAL2
Crystal Osc/Buffer
TXA, RXA, DTRA#,
DSRA#, RTSA#,
DTSA#, CDA#, RIA#,
OP2A#
8-bit Data
Bus
Interface
UART Channel A
16 Byte TX FIFO
16 Byte RX FIFO
BRG
TX & RX
UART
Regs
2.97V to 5.5V
GND
TXB, RXB, DTRB#,
DSRB#, RTSB#,
CTSB#, CDB#, RIB#,
OP2B#
UART Channel B
(same as Channel A)
A2:A0
D7:D0
CSA#
CSB#
INTA
INTB
IOW#
IOR#
Reset
TXRDYA#
TXRDYB#
RXRDYA#
RDRXYB#


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