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ST16C1450CJ28 Fiches technique(PDF) 10 Page - Exar Corporation |
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ST16C1450CJ28 Fiches technique(HTML) 10 Page - Exar Corporation |
10 / 28 page ST16C1450 xr 2.97V TO 5.5V UART REV. 4.2.1 10 3.0 UART INTERNAL REGISTERS The 1450 has a set of configuration registers selected by address lines A0, A1 and A2. The 16C450 compatible registers can be accessed when LCR[7] = 0 and the baud rate generator divisor registers can be accessed when LCR[7] = 1. The complete register set is shown on Table 2 and Table 3. TABLE 2: ST16C1450 UART INTERNAL REGISTERS A2,A1,A0 ADDRESSES REGISTER READ/WRITE COMMENTS 0 0 0 RHR - Receive Holding Register THR - Transmit Holding Register Read-only Write-only LCR[7] = 0 0 0 0 DLL - Div Latch Low Byte Read/Write LCR[7] = 1 0 0 1 DLM - Div Latch High Byte Read/Write 0 0 1 IER - Interrupt Enable Register Read/Write LCR[7] = 0 0 1 0 ISR - Interrupt Status Register Reserved Read-only Write-only 0 1 1 LCR - Line Control Register Read/Write 1 0 0 MCR - Modem Control Register Read/Write LCR[7] = 0 1 0 1 LSR - Line Status Register Reserved Read-only Write-only 1 1 0 MSR - Modem Status Register Reserved Read-only Write-only 1 1 1 SPR - Scratch Pad Register Read/Write |
Numéro de pièce similaire - ST16C1450CJ28 |
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Description similaire - ST16C1450CJ28 |
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