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MC34703PNB Fiches technique(PDF) 11 Page - Freescale Semiconductor, Inc

No de pièce MC34703PNB
Description  10A Switch-Mode Power Supply with LDO Regulator
Download  46 Pages
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Fabricant  FREESCALE [Freescale Semiconductor, Inc]
Site Internet  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC34703PNB Fiches technique(HTML) 11 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
11
34703
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics noted under conditions -40°C
≤ T
J ≤ 125°C unless otherwise noted. Input voltages VIN1 = VIN2 = 3.3 V using
the typical application circuit (see Figure 27) unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
BUCK CONVERTER (SW, SR)
Duty Cycle Range (Normal Operation) (22)
D
10
90
%
Switching Node SW Rise Time (22)
ILOAD = 10 A, SR = OPEN, VIN1 = VIN2 = 3.3 V
tROPEN
10
ns
Switching Node SW Fall Time (22)
ILOAD = 10 A, SR = OPEN, VIN1 = VIN2 = 3.3 V
tFOPEN
10
ns
Switching Node SW Rise Time (22)
ILOAD = 10 A, SR = SW, VIN1 = VIN2 = 3.3 V
tRSW
14
ns
Switching Node SW Fall Time (22)
ILOAD = 10 A, SR = SW, VIN1 = VIN2 = 3.3 V
tFSW
14
ns
Switching Node SW Rise Time (22)
ILOAD = 10 A, SR = BOOT,VIN1 = VIN2 = 3.3 V
tRBOOT
6.0
ns
Switching Node SW Fall Time (22)
ILOAD = 10 A, SR = BOOT, VIN1 = VIN2 = 3.3 V
tFBOOT
6.0
ns
Maximum Deadtime (22)
tD
150
ns
Buck Control Loop Propagation Delay (22)
VINV < 0.8 V to VSW > 90% of High Level or VINV > 0.8 V to VSW < 10%
of Low Level
tPD
50
ns
Soft Start Duration (Power Sequencing Disabled, EN1 = 1, EN2 = 1) (22)
tSS
800
µs
Fault Condition Timeout (22)
tFAULT
10
ms
Retry Timer Cycle (22)
tRET
100
ms
OSCILLATOR (FREQ)
Oscillator Default Frequency (Switching Frequency), FREQ Pin Open
fOSC
250
300
350
kHz
Oscillator Frequency Range
fOSC
200
400
kHz
Oscillator Output Signal Duty Cycle (Square Wave, 180° Out-of-Phase with
the Internal Suitable Oscillator) (23)
DOSC
50
%
Synchronization Pulse Minimum Duration (22)
tSYNC
300
ns
BOOST REGULATOR (VBST, VBST (sense), VBD)
Boost Regulator FET Maximum ON Time (23)
tON
24
µs
Boost Regulator Control Loop Propagation Delay (22)
tBSTPD
50
ns
Boost Switching Node VBD Rise Time
(22)
IBST = 45 mA
tBR
35
ns
Boost Switching Node VBD Fall Time
(22)
IBST = 45 mA
tBF
5.0
ns
Notes
22.
Design Information only. Not production tested.
23.
Not production tested for typical values specified.


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