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PCK2023 Datasheet(Fiches technique) 3 Page - NXP Semiconductors

Numéro de pièce PCK2023
Description  CK408 66/100/133/200 MHz spread spectrum differential system clock generator
Télécharger  30 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
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Philips Semiconductors
Product data
PCK2023
CK408 (66/100/133/200 MHz) spread
spectrum differential system clock generator
2001 Sep 07
3
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
56
ref
3.3 V 14.318 MHz clock output.
2
XTAL_In
14.318 MHz crystal input.
3
XTAL_Out
14.318 MHz crystal output.
44, 45, 48, 49, 51, 52
CPU & CPU
[2:0]
Differential CPU clock outputs.
33
3V66_0
3.3 V 66 MHz clock output.
35
3V66_1/VCH
3.3 V selectable through I2C to be 66 MHz or 48 MHz
24
66In/3V66_5
66 MHz input to buffered 66Buff and PCI or 66 MHz clock from internal VCO.
21, 22, 23
66Buff [2:0] / 3V66 [4:2]
66 MHz buffered outputs from 66 input or 66 MHz clocks from internal VCO.
5, 6, 7
PCIF
[2:0]
33 MHz clocks divided down from 66 input or divided down from 3V66.
10, 11, 12, 13, 16, 17,
18
PCI
[6:0]
PCI clock outputs divided down from 66 input or divided down from 3V66.
39
USB
Fixed 48 MHz clock output.
38
DOT
Fixed 48 MHz clock output.
40
S2
Special 3.3 V 3 level input for mode selection.
54, 55
S1, S0
3.3 V LVTTL inputs for CPU frequency selection.
42
Iref
A precision resistor is attached to this pin which is connected to the internal current
reference.
43
Mult0
3.3 V LVTTL input for selecting the current multiplier for the CPU outputs.
25
PWRDWN
3.3 V LVTTL input for PowerDown active low.
34
PCI_Stop
3.3 V LVTTL input for PCI_Stop active low.
53
CPU_Stop
3.3 V LVTTL input for CPU_Stop active low.
28
Vtt_Pwrgd
3.3 V LVTTL input is a level sensitive strobe used to determine when S [2:0] and Mult0
inputs are valid and ok to be sampled (active low).
29
SDATA
I2C compatible SDATA.
30
SCLOCK
I2C compatible SCLOCK.
1, 8, 14, 19, 32, 37, 46,
50
VDD
3.3 V power supply for outputs.
26
VDDA
3.3 V power supply for PLL.
4, 9, 15, 20, 31, 36, 41,
47
VSS
Ground for outputs.
27
VSSA
Ground for PLL.




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