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AD9948KCP Fiches technique(PDF) 4 Page - Analog Devices |
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AD9948KCP Fiches technique(HTML) 4 Page - Analog Devices |
4 / 28 page REV. 0 –4– AD9948 TIMING SPECIFICATIONS Parameter Symbol Min Typ Max Unit MASTER CLOCK (CLI) (See Figure 4) CLI Clock Period tCLI 40 ns CLI High/Low Pulsewidth tADC 16 20 24 ns Delay from CLI to Internal Pixel Period Position tCLIDLY 6ns CLPOB Pulsewidth (Programmable) * tCOB 220 Pixels SAMPLE CLOCKS (See Figure 6) SHP Rising Edge to SHD Rising Edge tS1 17 20 ns DATA OUTPUTS (See Figures 7a and 7b) Output Delay From Programmed Edge tOD 6ns Pipeline Delay 11 Cycles SERIAL INTERFACE Maximum SCK Frequency fSCLK 10 MHz SL to SCK Setup Time tLS 10 ns SCK to SL Hold Time tLH 10 ns SDATA Valid to SCK Rising Edge Setup tDS 10 ns SCK Falling Edge to SDATA Valid Hold tDH 10 ns SCK Falling Edge to SDATA Valid Read tDV 10 ns *Minimum CLPOB pulsewidth is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp reference. Specifications subject to change without notice. (CL = 20 pF, fCLI = 25 MHz, Serial Timing in Figure 3, unless otherwise noted.) ABSOLUTE MAXIMUM RATINGS * With Parameter Respect To Min Max Unit AVDD, TCVDD AVSS –0.3 +3.9 V HVDD, RGVDD HVSS, RGVSS –0.3 +3.9 V DVDD, DRVDD DVSS, DRVSS –0.3 +3.9 V Any VSS Any VSS –0.3 +0.3 V Digital Outputs DRVSS –0.3 DRVDD + 0.3 V CLPOB/PBLK, HBLK DVSS –0.3 DVDD + 0.3 V SCK, SL, SDATA DVSS –0.3 DVDD + 0.3 V RG RGVSS –0.3 RGVDD + 0.3 V H1–H4 HVSS –0.3 HVDD + 0.3 V REFT, REFB, CCDIN AVSS –0.3 AVDD + 0.3 V Junction Temperature 150 °C Lead Temperature (10 sec) 300 °C *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9948 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Temperature Package Package Model Range Description Option AD9948KCP –20 °C to +85°C LFCSP CP-40 AD9948KCPRL –20 °C to +85°C LFCSP CP-40 AD9948KCPZ * –20 °C to +85°C LFCSP CP-40 AD9948KCPZRL * –20 °C to +85°C LFCSP CP-40 *This is a lead free product. THERMAL CHARACTERISTICS Thermal Resistance 40-Lead LFCSP Package JA = 27 °C/W* * JA is measured using a 4-layer PCB with the exposed paddle soldered to the board. |
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Description similaire - AD9948KCP |
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