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Enter Programming Mode

SDATA

CE

0

t

2

DATA

0

1

1

0

0

SDATA

DELAYED

t

1

t

6

t

f

t

5

t

4

t

r

T0042-05

t

3

t

7

EEPROM PROGRAMMING

CDCE421

SCAS842 – APRIL 2007

Figure 3 shows the timing behavior of data to be written into SDATA. The sequence shown is 00 1100. If the

can be seen in Figure 3, SDATA_DELAYED can be used to latch (or strobe) SDATA. The timing specifications

MIN

TYP

MAX

UNIT

Repeat frequency of programming

60

70

80

kHz

LOW signal: high-pulse duration

0.2 t

ms

LOW signal: low-pulse duration while entering programming sequence

0.8 t

ms

LOW signal: low-pulse duration while programming bits

0.8 t

ms

HIGH signal: high-pulse duration

0.8 t

ms

HIGH signal: low-pulse duration while entering programming sequence

0.2 t

ms

HIGH signal: low-pulse duration while programming bits

0.2 t

ms

Time-out during Entering Programming Mode and Enter Read Back Mode

16

µs

until next bit must turn on

CE-high time before first SDATA can be clocked in

3 t

ms

Rise Time and Fall Time

2

ns

Figure 3. SDATA/CE Timing

Load all the registers in RAM by writing Word0 through Word5, and after going back to State 2, then going to

State 3 (programming EEPROM, no locking) or State 4 (programming EEPROM with locking), the contents of

Word0–Word5 are saved in the EEPROM. Wait 10 ms in State 3 or State 4 when programming the EEPROM

before moving to State 2 (the idle state).

NOTE:

When writing to the device for functionality testing and verification via the serial bus,

only the RAM is being accessed.

6

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