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ISL90842 Fiches technique(PDF) 5 Page - Intersil Corporation

No de pièce ISL90842
Description  Quad Digitally Controlled Variable Resistors
Download  10 Pages
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Fabricant  INTERSIL [Intersil Corporation]
Site Internet  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL90842 Fiches technique(HTML) 5 Page - Intersil Corporation

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5
FN8096.1
January 16, 2006
SDA vs SCL Timing
A0 and A1 Pin Timing
NOTES:
1. Typical values are for TA = 25°C and 3.3V supply voltage.
2. MI =
|R255 – R0| / 255. R255 and R0 are the measured resistances for the DCP register set to FF hex and 00 hex, respectively.
3. Roffset = R255 / MI, when measuring between RW and RH.
4. RDNL = (Ri – Ri-1) / MI, for i = 32 to 255.
5. RINL = [Ri – (MI • i) – R0] / MI, for i = 32 to 255.
6. RMATCH = (Ri,x – Ri,y) / MI, for i = 0 to 255, x = 0 to 3 and y = 0 to 3.
7.
for i = 32 to 255, T = -40°C to 85°C. Max ( ) is the maximum value of the resistance and Min ( ) is the
minimum value of the resistance over the temperature range.
8. This parameter is not 100% tested.
tSU:A
A1 and A0 setup time
Before START condition
600
ns
tHD:A
A1 and A0 hold time
After STOP condition
600
ns
Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
(NOTE 1)
MAX
UNIT
tSU:STO
tDH
tHIGH
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
SCL
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
tF
tLOW
tBUF
tAA
tR
tHD:A
SCL
SDA IN
A0, A1
tSU:A
CLK 1
START
STOP
TCR
Max Ri
() Min Ri
()
[]
Max Ri
() Min Ri
()
+
[] 2
----------------------------------------------------------------
10
6
125°C
-----------------
×
=
ISL90842


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