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ISL90840 Fiches technique(PDF) 1 Page - Intersil Corporation |
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ISL90840 Fiches technique(HTML) 1 Page - Intersil Corporation |
1 / 13 page 1 ® FN8086.2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) and XDCP are registered trademarks of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL90840 Quad Digitally Controlled Potentiometers (XDCP™) Low Noise, Low Power I2C® Bus, 256 Taps The ISL90840 integrates four digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the I2C bus interface. Each potentiometer has an associated volatile Wiper Register (WR) that can be directly written to and read by the user. The contents of the WR controls the position of the wiper. When powered on the ISL90810’s wiper will always commence at mid-scale (128 tap position). The DCPs can be used as three-terminal potentiometers or as two-terminal variable resistors in a wide variety of applications including control, parameter adjustments, and signal processing. Features • Four potentiometers in one package • 256 resistor taps - 0.4% resolution •I2C serial interface - Three address pins, up to eight devices/bus - Write/Read capability • Power-on preset to mid-scale (128 tap position) • Wiper resistance: 70 Ω typical @ 3.3V • Standby current <5µA max • Power supply: 2.7V to 5.5V •50k Ω, 10kΩ total resistance • 20 Ld TSSOP package • Pb-free plus anneal available (RoHS compliant) Pinout ISL90840 (20 LD TSSOP) TOP VIEW RW0 RL0 RH0 D.N.C. VCC A1 A0 RH1 RL1 RW1 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 RH3 RL3 RW3 A2 SCL SDA GND RW2 RL2 RH2 Ordering Information PART NUMBER PART MARKING RESIST-ANCE OPTION ( Ω) TEMP RANGE (°C) PACKAGE PKG. DWG # ISL90840UIV2027Z (Notes 1 and 2) ISL90840UI27Z 50k -40 to +85 20 Ld TSSOP (Pb-free) MDP0044 ISL90840UIV2027 ISL90840UI27 50k -40 to +85 20 Ld TSSOP MDP0044 ISL90840UAV2027Z (Notes 1 and 2) ISL90840UA27Z 50k -40 to +105 20 Ld TSSOP (Pb-free) MDP0044 ISL90840WIV2027Z (Notes 1 and 2) ISL90840WI27Z 10k -40 to +85 20 Ld TSSOP (Pb-free) MDP0044 ISL90840WIV2027 ISL90840WI27 10k -40 to +85 20 Ld TSSOP MDP0044 ISL90840WAV2027Z (Notes 1 and 2) ISL90840WA27Z 10k -40 to +105 20 Ld TSSOP (Pb-free) MDP0044 NOTES: 1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Add “T2” suffix for tape and reel. Data Sheet November 14, 2006 |
Numéro de pièce similaire - ISL90840_06 |
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Description similaire - ISL90840_06 |
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