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ISL59112IEZ-T7 Fiches technique(PDF) 7 Page - Intersil Corporation |
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ISL59112IEZ-T7 Fiches technique(HTML) 7 Page - Intersil Corporation |
7 / 8 page 7 FN6142.4 March 15, 2007 Power Supply Bypassing Printed Circuit Board Layout As with any modern operational amplifier, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail. Printed Circuit Board Layout For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces. ISL59112 |
Numéro de pièce similaire - ISL59112IEZ-T7 |
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Description similaire - ISL59112IEZ-T7 |
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