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ISL5585GCM Fiches technique(PDF) 4 Page - Intersil Corporation |
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ISL5585GCM Fiches technique(HTML) 4 Page - Intersil Corporation |
4 / 24 page 4 10 6 F0 Mode control input. 11 7 E0 Detector Output Selection Input. This TTL input controls the multiplexing of the SHD (E0 = 1) and GKD (E0 = 0) comparator outputs to the DET output based upon the state at the F2-F0 pins (see the Device Operating Modes table shown on page 2). 12 9 DET Detector Output - This TTL output provides on-hook/off-hook status of the loop based upon the selected operating mode. The detected output will either be switch hook, ground key or ring trip (see the Device Operating Modes table shown on page 2). DET will be latched low following a ring trip. Unlatching the DET pin is accomplished by changing logic state. 13 10 ALM Thermal Shutdown Alarm. This pin signals the internal die temperature has exceeded safe operating temperature (approximately 175°C) and the device has been powered down automatically. 14 11 AGND Analog ground reference. This pin should be externally connected to BGND. 15 12 BSEL Selects between high and low battery, with a logic “1” selecting the high battery and logic “0” the low battery. 16 13 TL Programming pin for the transient current limit feature, set by an external resistor to ground. 17 14 POL External capacitor on this pin sets the polarity reversal time. 18 15 VRS Ringing Signal Input - Analog input for driving 2-wire interface while in Ring Mode. 19 17 AUX Auxiliary input - Float if not used. 20 18 VTX Transmit Output Voltage - Output of impedance matching amplifier, AC couples through a resistor to CODEC. 21 19 VFB Feedback voltage for impedance matching. This voltage is scaled to accomplish impedance matching. The CFB capacitor connects between this pin and the -IN pin. The CFB cap needs to be non-polarized for proper device operation in the Reverse Active mode. Ceramic surface mount capacitors (1206 body style) are available from Panasonic with a 6.3V voltage rating. These can be used for CFB since it is internally limited to approximately ±3V. 22 20 -IN Analog Receive Voltage - 4-wire analog audio input voltage. connects to CODEC via receive gain setting resistor RIN (see Figure 18). Resistor RIN needs to be as close to the -IN pin as possible to minimize parasitic capacitance. 23 21 VCC Positive voltage power supply,+3.3V 24 22 CDC DC Biasing Filter Capacitor - Connects between this pin and VCC.The CDC capacitor may be either polarized or non polarized with a 6.3V voltage rating. 25 23 RT Ring trip filter network. 26 24 ILIM Loop Current Limit programming resistor. 27 25 SH Switch hook detection threshold programming resistor. --- 26 SCC Substrate Common Connection - Connect this pin to VBH Supply. This pin is used to connect the substrate of the die and the thermal heatsink plane of the QFN package. 28 27 RING RING power amplifier output. Pin Description (Continued) PLCC QFN SYMBOL DESCRIPTION ISL5585 |
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