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AM50DL128CG70IT Fiches technique(PDF) 11 Page - Advanced Micro Devices |
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AM50DL128CG70IT Fiches technique(HTML) 11 Page - Advanced Micro Devices |
11 / 63 page 10 Am50DL128CG November 7, 2002 P R E L I M I NARY MCP DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is a latch used to store the com- mands, along with the address and data information needed to execute the command. The contents of the register serve as inputs to the internal state machine. The state machine outputs dictate the function of the device. Tables 1 lists the device bus operations, the in- puts and control levels they require, and the resulting output. The following subsections describe each of these operations in further detail. |
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