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ATTINY2313-20MU Fiches technique(PDF) 79 Page - ATMEL Corporation |
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ATTINY2313-20MU Fiches technique(HTML) 79 Page - ATMEL Corporation |
79 / 231 page 79 ATtiny2313/V 2543I–AVR–04/06 Table 39 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase correct PWM mode. Note: 1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Compare Match is ignored, but the set or clear is done at TOP. See “Phase Cor- rect PWM Mode” on page 73 for more details. • Bits 3, 2 – Res: Reserved Bits These bits are reserved bits in the ATtiny2313 and will always read as zero. • Bits 1:0 – WGM01:0: Waveform Generation Mode Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting sequence of the counter, the source for maximum (TOP) counter value, and what type of waveform generation to be used, see Table 40. Modes of operation sup- ported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes (see “Modes of Operation” on page 70). Notes: 1. MAX = 0xFF 2. BOTTOM = 0x00 Table 39. Compare Output Mode, Phase Correct PWM Mode (1) COM0B1 COM0B0 Description 0 0 Normal port operation, OCR0B disconnected. 01 Reserved 1 0 Clear ORC0B on Compare Match when up-counting. Set OCR0B on Compare Match when down-counting. 1 1 Set OCR0B on Compare Match when up-counting. Clear OCR0B on Compare Match when down-counting. Table 40. Waveform Generation Mode Bit Description Mode WGM2 WGM1 WGM0 Timer/Count er Mode of Operation TOP Update of OCRx at TOV Flag Set on (1)(2) 0 0 0 0 Normal 0xFF Immediate MAX 1 0 0 1 PWM, Phase Correct 0xFF TOP BOTTOM 2 0 1 0 CTC OCR0A Immediate MAX 3 0 1 1 Fast PWM 0xFF TOP MAX 41 0 0 Reserved – – – 5 1 0 1 PWM, Phase Correct OCR0A TOP BOTTOM 61 1 0 Reserved – – – 7 1 1 1 Fast PWM OCR0A TOP TOP |
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