AD8330ACPZ-RL datasheet(4/32 Pages) AD

No de pièce	AD8330ACPZ-RL

Description	Low Cost DC to 150 MHz Variable Gain Amplifier

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Fabricant	AD [Analog Devices]

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AD8330

Rev. C | Page 4 of 32

Parameter

Conditions

Min

Typ

Max

Unit

CHIP ENABLE

Pin ENBL

Logic Voltage for Full Shutdown

0.5

V

Logic Voltage for Hibernate Mode

Output pins remain at CNTR

1.3

1.5

1.7

V

Logic Voltage for Full Operation

2.3

V

Current in Full Shutdown

20

100

μA

Current in Hibernate Mode

1.5

mA

Minimum Time Delay3

1.7

μs

POWER SUPPLY

VPSI, VPOS, VPSO, COMM, and CMOP pins

Supply Voltage

2.7

6

V

Quiescent Current

VDBS = 0.75 V

20

27

mA

1 The use of an input common-mode voltage significantly different than the internally set value is not recommended due to its effect on noise performance.

See Figure 56.

2 See Typical Performance Characteristics for more detailed information on distortion in a variety of operating conditions.

3 For minimum sized coupling capacitors.

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