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MC10216FN Fiches technique(PDF) 1 Page - ON Semiconductor

No de pièce MC10216FN
Description  High Speed Triple Line Receiver
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Fabricant  ONSEMI [ON Semiconductor]
Site Internet  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC10216FN Fiches technique(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10216/D
MC10216
High Speed Triple Line
Receiver
The MC10216 is a high speed triple differential amplifier designed
for use in sensing differential signals over long lines. The base bias
supply (VBB) is made available at pin 11 to make the device useful as a
Schmitt trigger, or in other applications where a stable reference
voltage is necessary.
Active current sources provide the MC10216 with excellent
common mode noise rejection. If any amplifier in a package is not
used, one input of that amplifier must be connected to VBB (pin 11) to
prevent upsetting the current source bias network.
Complementary outputs are provided to allow driving twisted pair
lines, to enable cascading of several amplifiers in a chain, or simply to
provide complement outputs of the input logic function.
P
D = 100 mW typ/pkg (No Load)
t
pd = 1.8 ns typ (Single ended)
= 1.5 ns typ (Differential)
t
r, tf = 1.5 ns typ (20%–80%)
DIP PIN ASSIGNMENT
VCC1
AOUT
AOUT
AIN
AIN
BOUT
BOUT
VEE
VCC2
COUT
COUT
CIN
CIN
VBB
BIN
BIN
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
5
4
11
3
2
10
9
7
6
13
12
15
14
VBB
*VBB to be used to supply bias to the MC10216 only and
bypassed (when used) with 0.01
µF to 0.1 µF capacitor.
When the input pin with bubble goes positive, it’s
respective output pin with bubble goes positive.
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10216L
CDIP–16
25 Units / Rail
MC10216P
PDIP–16
25 Units / Rail
MC10216FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10216L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10216
AWLYYWW
1
1
16
MC10216P
AWLYYWW


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