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SP5848 Fiches technique(PDF) 4 Page - Zarlink Semiconductor Inc

No de pièce SP5848
Description  2.2/1.3GHz 3-Wire Bus Dual Low Phase Noise PLL
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Fabricant  ZARLINK [Zarlink Semiconductor Inc]
Site Internet  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

SP5848 Fiches technique(HTML) 4 Page - Zarlink Semiconductor Inc

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SP5848
Preliminary Information
Electrical Characteristics (continued)
Tamb= -40
o
C to +80
o
C, Vcc = 4.5 to 5.5 V, These characteristics are guaranteed by either production test or
design. They apply within the specified ambient temperature and supply voltage unless otherwise stated.
Characteristic
Pin
Value
Units
Conditions
Min
Typ
Max
Synthesiser 2 (DOWN)
RF2 input voltage
5,6
30
300
mV
rms
80 -1300MHz
RF2 input impedance
5,6
See Figure 5
RF2 division ratio
240
65535
Reference division 2
See Table 2
ratio
Comparison frequency 2
16.25
4000
KHz
Phase noise degrades above
250KHz
Equivalent phase noise
-144
dBc/Hz
SSB, within loop bandwidth, all
at phase detector 2
comparison frequencie up to
250KHz
Charge pump 2 output
2
See Table 4
current
Vpin 2=2V
Charge pump 2 output
2
±3
±10
nA
Vpin2 = 2V
leakage
Charge pump 2 drive
3
0.5
mA
Vpin 3 = 0.7V
output curent
Data, clock and enable
12,11,13
Input high voltage
3
Vcc
V
Input low voltage
0
0.7
V
Input current
-10
10
µA
All input conditions
hysterysis
0.8
Vpp
Clock rate
11
500
KHz
Bus timing -
Data set up
300
ns
Data hold
600
ns
Enable setup
300
ns
Enable hold
600
ns
Clock to enable
300
ns
Reference Oscillator
Crystal frequency
8, 9
2
16
MHz
See Figure 6 for application
External reference input
8
2
20
MHz
Sinewave coupled through
frequency
10nF blocking capacitor
External reference drive
8
0.2
0.5
Vpp
Sinewave coupled through
10nF blocking capacitor
Outputs ports P0 - P1
1, 20
See note 1
sink current
2
mA
Vport = 0.7V
leakage current
10
µA
Vport = Vcc
Note 1 Output ports high impedance on power up, with data, clock and enable at logic 0


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