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CAT22C10LA-20-TE13 Fiches technique(PDF) 7 Page - Catalyst Semiconductor |
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CAT22C10LA-20-TE13 Fiches technique(HTML) 7 Page - Catalyst Semiconductor |
7 / 10 page CAT22C10 7 Doc. No. 1082, Rev. O mended. Write With the chip enabled and the nonvolatile functions inhibited, the Write Enable (WE) pin will select the write mode when driven to a low level. In this mode, the address must be supplied for the byte being written. After the set-up time (tAS), the input data must be Figure 2. Write Cycle Timing Figure 3. Early Write Cycle Timing supplied to pins I/O0–I/O3. When these conditions, in- cluding the write pulse width time (tWP) are met, the data will be written to the specified location in the Static RAM. A write function may also be initiated from the standby mode by driving WE low, inhibiting the nonvolatile func- tions, supplying valid addresses, and then taking CS low and supplying input data. tWC tAS tWR DATA VALID CS DATA IN ADDRESS WE tWP tDW tCW tDH DATA OUT HIGH-Z tWC tAS tWR DATA VALID CS DATA IN ADDRESS WE tWP tDW tCW tDH DATA OUT tWZ tOW HIGH-Z |
Numéro de pièce similaire - CAT22C10LA-20-TE13 |
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Description similaire - CAT22C10LA-20-TE13 |
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